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author | Tom Rini <trini@konsulko.com> | 2023-02-28 01:28:21 +0300 |
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committer | Tom Rini <trini@konsulko.com> | 2023-02-28 01:28:21 +0300 |
commit | 5b197eee334bdf75cc9e9148161299679a5251ea (patch) | |
tree | edec3c21a01fb54d764d04caa2bd774823e76c2d /arch/arm/mach-tegra/tegra114/clock.c | |
parent | 7a826ded4a0e409d73ff4a910685821d34f1b664 (diff) | |
parent | e8c80ac0f7a13bf0fc016ce324b870c0cff7a2b8 (diff) | |
download | u-boot-5b197eee334bdf75cc9e9148161299679a5251ea.tar.xz |
Merge tag 'v2023.04-rc3' into next
Prepare v2023.04-rc3
Diffstat (limited to 'arch/arm/mach-tegra/tegra114/clock.c')
-rw-r--r-- | arch/arm/mach-tegra/tegra114/clock.c | 39 |
1 files changed, 38 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/tegra114/clock.c b/arch/arm/mach-tegra/tegra114/clock.c index 143f86863f..8ad71f590f 100644 --- a/arch/arm/mach-tegra/tegra114/clock.c +++ b/arch/arm/mach-tegra/tegra114/clock.c @@ -19,6 +19,8 @@ #include <fdtdec.h> #include <linux/delay.h> +#include <dt-bindings/clock/tegra114-car.h> + /* * Clock types that we can use as a source. The Tegra114 has muxes for the * peripheral clocks, and in most cases there are four options for the clock @@ -646,6 +648,41 @@ enum periph_id clk_id_to_periph_id(int clk_id) return clk_id; } } + +/* + * Convert a device tree clock ID to our PLL ID. + * + * @param clk_id Clock ID according to tegra114 device tree binding + * Return: clock ID, or CLOCK_ID_NONE if the clock ID is invalid + */ +enum clock_id clk_id_to_pll_id(int clk_id) +{ + switch (clk_id) { + case TEGRA114_CLK_PLL_C: + return CLOCK_ID_CGENERAL; + case TEGRA114_CLK_PLL_M: + return CLOCK_ID_MEMORY; + case TEGRA114_CLK_PLL_P: + return CLOCK_ID_PERIPH; + case TEGRA114_CLK_PLL_A: + return CLOCK_ID_AUDIO; + case TEGRA114_CLK_PLL_U: + return CLOCK_ID_USB; + case TEGRA114_CLK_PLL_D: + case TEGRA114_CLK_PLL_D_OUT0: + return CLOCK_ID_DISPLAY; + case TEGRA114_CLK_PLL_X: + return CLOCK_ID_XCPU; + case TEGRA114_CLK_PLL_E_OUT0: + return CLOCK_ID_EPCI; + case TEGRA114_CLK_CLK_32K: + return CLOCK_ID_32KHZ; + case TEGRA114_CLK_CLK_M: + return CLOCK_ID_CLK_M; + default: + return CLOCK_ID_NONE; + } +} #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */ void clock_early_init(void) @@ -745,7 +782,7 @@ struct periph_clk_init periph_clk_init_table[] = { { PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH }, { PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH }, { PERIPH_ID_SDMMC4, CLOCK_ID_PERIPH }, - { PERIPH_ID_PWM, CLOCK_ID_SFROM32KHZ }, + { PERIPH_ID_PWM, CLOCK_ID_PERIPH }, { PERIPH_ID_I2C1, CLOCK_ID_PERIPH }, { PERIPH_ID_I2C2, CLOCK_ID_PERIPH }, { PERIPH_ID_I2C3, CLOCK_ID_PERIPH }, |