diff options
| author | JC Kuo <jckuo@nvidia.com> | 2020-03-27 02:10:09 +0300 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2020-04-03 00:30:01 +0300 |
| commit | d491dc09e4cfb7e513d3d6f448d811f1297753d9 (patch) | |
| tree | df53d53d39048ade69bc6e351ee8c78b9aff5fc7 /arch/arm/mach-tegra/xusb-padctl-dummy.c | |
| parent | 9eb15cbe5c94fca24519b5d89d934eeb34a68e5d (diff) | |
| download | u-boot-d491dc09e4cfb7e513d3d6f448d811f1297753d9.tar.xz | |
t210: do not enable PLLE and UPHY PLL HW PWRSEQ
This commit removes the programming sequence that enables PLLE and UPHY
PLL hardware power sequencers. Per TRM, boot software should enable PLLE
and UPHY PLLs in software controlled power-on state and should power
down PLL before jumping into kernel or the next stage boot software.
Adds call to board_cleanup_before_linux to facilitate this.
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/xusb-padctl-dummy.c')
| -rw-r--r-- | arch/arm/mach-tegra/xusb-padctl-dummy.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/xusb-padctl-dummy.c b/arch/arm/mach-tegra/xusb-padctl-dummy.c index 3ec27a2e3a..f2d90302f6 100644 --- a/arch/arm/mach-tegra/xusb-padctl-dummy.c +++ b/arch/arm/mach-tegra/xusb-padctl-dummy.c @@ -36,3 +36,7 @@ int __weak tegra_xusb_phy_unprepare(struct tegra_xusb_phy *phy) void __weak tegra_xusb_padctl_init(void) { } + +void __weak tegra_xusb_padctl_exit(void) +{ +} |