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authorStephan Gerhold <stephan@gerhold.net>2020-01-04 20:45:17 +0300
committerTom Rini <trini@konsulko.com>2020-01-23 01:47:57 +0300
commit689088f9dae8b823651095a34aff76cc61099ef9 (patch)
treeb08bbef8f3996de67ccdf4c698f42ada59c85ab4 /arch/arm/mach-u8500
parentf13dc8cbd9df5c4eab4f0c6481ba403dbe4e8729 (diff)
downloadu-boot-689088f9dae8b823651095a34aff76cc61099ef9.tar.xz
arm: Add support for ST-Ericsson U8500 SoC
The NovaThor U8500 SoC was released by ST-Ericsson in 2011. It was used for some development boards like the CALAO Systems Snowball SBC, but mass production was primarily for Android smartphones like the Samsung Galaxy S III mini. Previous support for U8500 was removed in commit 68282f55b846 ("arm: Remove unused ST-Ericsson u8500 arch") since none of the boards were converted to generic boards before the deadline. The new code does not have much in common with the previous code. I have completely rewritten everything, embracing the Driver Model and device trees wherever possible. The U8500 support is a bit more minimal for now - my primary use case is to use U-Boot as alternative bootloader for some of the U8500 Samsung smartphones. At the moment U-Boot is chain-loaded from the original Samsung bootloader. A side effect of this is that we can (temporarily) get away without implementing some functionality - e.g. all clocks are already enabled by the original bootloader. More functionality will be added in future patches. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: John Rigby <john.rigby@linaro.org> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/mach-u8500')
-rw-r--r--arch/arm/mach-u8500/Kconfig6
-rw-r--r--arch/arm/mach-u8500/Makefile4
-rw-r--r--arch/arm/mach-u8500/cache.c37
-rw-r--r--arch/arm/mach-u8500/cpuinfo.c25
4 files changed, 72 insertions, 0 deletions
diff --git a/arch/arm/mach-u8500/Kconfig b/arch/arm/mach-u8500/Kconfig
new file mode 100644
index 0000000000..3bc76295cb
--- /dev/null
+++ b/arch/arm/mach-u8500/Kconfig
@@ -0,0 +1,6 @@
+if ARCH_U8500
+
+config SYS_SOC
+ default "u8500"
+
+endif
diff --git a/arch/arm/mach-u8500/Makefile b/arch/arm/mach-u8500/Makefile
new file mode 100644
index 0000000000..0a53cbd9ac
--- /dev/null
+++ b/arch/arm/mach-u8500/Makefile
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+obj-y += cache.o
+obj-$(CONFIG_DISPLAY_CPUINFO) += cpuinfo.o
diff --git a/arch/arm/mach-u8500/cache.c b/arch/arm/mach-u8500/cache.c
new file mode 100644
index 0000000000..3d96d09f31
--- /dev/null
+++ b/arch/arm/mach-u8500/cache.c
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (C) 2019 Stephan Gerhold <stephan@gerhold.net>
+ */
+
+#include <common.h>
+#include <cpu_func.h>
+#include <asm/armv7.h>
+#include <asm/pl310.h>
+
+#define PL310_WAY_MASK 0xff
+
+#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
+void enable_caches(void)
+{
+ /* Enable D-cache. I-cache is already enabled in start.S */
+ dcache_enable();
+}
+#endif
+
+#ifdef CONFIG_SYS_L2_PL310
+void v7_outer_cache_disable(void)
+{
+ struct pl310_regs *const pl310 = (struct pl310_regs *)CONFIG_SYS_PL310_BASE;
+
+ /*
+ * Linux expects the L2 cache to be turned off by the bootloader.
+ * Otherwise, it fails very early (shortly after decompressing the kernel).
+ *
+ * On U8500, the L2 cache can be only turned on/off from the secure world.
+ * Instead, prevent usage of the L2 cache by locking all ways.
+ * The kernel needs to unlock them to make the L2 cache work again.
+ */
+ writel(PL310_WAY_MASK, &pl310->pl310_lockdown_dbase);
+ writel(PL310_WAY_MASK, &pl310->pl310_lockdown_ibase);
+}
+#endif
diff --git a/arch/arm/mach-u8500/cpuinfo.c b/arch/arm/mach-u8500/cpuinfo.c
new file mode 100644
index 0000000000..20f5ff3398
--- /dev/null
+++ b/arch/arm/mach-u8500/cpuinfo.c
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (C) 2019 Stephan Gerhold <stephan@gerhold.net>
+ */
+
+#include <common.h>
+#include <asm/io.h>
+
+#define U8500_BOOTROM_BASE 0x90000000
+#define U8500_ASIC_ID_LOC_V2 (U8500_BOOTROM_BASE + 0x1DBF4)
+
+int print_cpuinfo(void)
+{
+ /* Convert ASIC ID to display string, e.g. 0x8520A0 => DB8520 V1.0 */
+ u32 asicid = readl(U8500_ASIC_ID_LOC_V2);
+ u32 cpu = (asicid >> 8) & 0xffff;
+ u32 rev = asicid & 0xff;
+
+ /* 0xA0 => 0x10 (V1.0) */
+ if (rev >= 0xa0)
+ rev -= 0x90;
+
+ printf("CPU: ST-Ericsson DB%x V%d.%d\n", cpu, rev >> 4, rev & 0xf);
+ return 0;
+}