diff options
author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2019-07-10 14:07:40 +0300 |
---|---|---|
committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2019-07-10 16:42:00 +0300 |
commit | d41b358fb331c2907f1f217686d38eeaf17eece4 (patch) | |
tree | 9d8ea673b2beca4fab63764e762f74c455021e62 /arch/arm/mach-uniphier/debug-uart | |
parent | c3d8f1e8e92fd70abb912942300cf44fff9e9d86 (diff) | |
download | u-boot-d41b358fb331c2907f1f217686d38eeaf17eece4.tar.xz |
ARM: uniphier: de-couple SG macros into base address and offset
The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.
Turn the SG_* macros into the offset from the base address.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/mach-uniphier/debug-uart')
-rw-r--r-- | arch/arm/mach-uniphier/debug-uart/debug-uart-pro4.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-uniphier/debug-uart/debug-uart-pro5.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-uniphier/debug-uart/debug-uart.c | 5 |
3 files changed, 5 insertions, 4 deletions
diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart-pro4.c b/arch/arm/mach-uniphier/debug-uart/debug-uart-pro4.c index 0d6629918a..9017a24a10 100644 --- a/arch/arm/mach-uniphier/debug-uart/debug-uart-pro4.c +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart-pro4.c @@ -20,7 +20,7 @@ unsigned int uniphier_pro4_debug_uart_init(void) sg_set_iectrl(0); sg_set_pinsel(128, 0, 4, 8); /* TXD0 -> TXD0 */ - writel(1, SG_LOADPINCTRL); + writel(1, sg_base + SG_LOADPINCTRL); tmp = readl(SC_CLKCTRL); tmp |= SC_CLKCTRL_CEN_PERI; diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart-pro5.c b/arch/arm/mach-uniphier/debug-uart/debug-uart-pro5.c index 1a0a942f2d..8e4d15c291 100644 --- a/arch/arm/mach-uniphier/debug-uart/debug-uart-pro5.c +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart-pro5.c @@ -23,7 +23,7 @@ unsigned int uniphier_pro5_debug_uart_init(void) sg_set_pinsel(51, 0, 4, 8); /* TXD2 -> TXD2 */ sg_set_pinsel(53, 0, 4, 8); /* TXD3 -> TXD3 */ - writel(1, SG_LOADPINCTRL); + writel(1, sg_base + SG_LOADPINCTRL); tmp = readl(SC_CLKCTRL); tmp |= SC_CLKCTRL_CEN_PERI; diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart.c b/arch/arm/mach-uniphier/debug-uart/debug-uart.c index bc96b2e7be..a70ce59acc 100644 --- a/arch/arm/mach-uniphier/debug-uart/debug-uart.c +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart.c @@ -32,7 +32,8 @@ void sg_set_pinsel(unsigned int pin, unsigned int muxval, unsigned int mux_bits, unsigned int reg_stride) { unsigned int shift = pin * mux_bits % 32; - unsigned long reg = SG_PINCTRL_BASE + pin * mux_bits / 32 * reg_stride; + void __iomem *reg = sg_base + SG_PINCTRL_BASE + + pin * mux_bits / 32 * reg_stride; u32 mask = (1U << mux_bits) - 1; u32 tmp; @@ -45,7 +46,7 @@ void sg_set_pinsel(unsigned int pin, unsigned int muxval, void sg_set_iectrl(unsigned int pin) { unsigned int bit = pin % 32; - unsigned long reg = SG_IECTRL + pin / 32 * 4; + void __iomem *reg = sg_base + SG_IECTRL + pin / 32 * 4; u32 tmp; tmp = readl(reg); |