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| author | Tom Rini <trini@konsulko.com> | 2021-08-11 15:31:25 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-08-11 15:31:25 +0300 |
| commit | 4dc1a5c248ecbd06269a7854dd06c57e9a52f19c (patch) | |
| tree | e401406a8a04c11e8f365a0769c6fea60b91b366 /arch/arm | |
| parent | aba3fa1d3f1dc8f7049317b8d6ea1d8cb8935e5e (diff) | |
| parent | e21c74f24be5b6d0387d79cb8cf66de0b9b6b0d3 (diff) | |
| download | u-boot-4dc1a5c248ecbd06269a7854dd06c57e9a52f19c.tar.xz | |
Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- Convert GoFlex Home Ethernet and SATA to Driver Model (Tony)
- mvebu: Automatically detect CONFIG_SYS_TCLK (Pavel)
- mvebu: sata_mv: Fix HDD identication during cold start (Tony)
- a37xx: pci: Fix handling PIO config error responses (Pavel)
- Other minor misc changes and board maintainer updates
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-kirkwood/include/mach/kw88f6281.h | 2 | ||||
| -rw-r--r-- | arch/arm/mach-mvebu/include/mach/soc.h | 15 | ||||
| -rw-r--r-- | arch/arm/mach-mvebu/spl.c | 6 |
3 files changed, 15 insertions, 8 deletions
diff --git a/arch/arm/mach-kirkwood/include/mach/kw88f6281.h b/arch/arm/mach-kirkwood/include/mach/kw88f6281.h index 33e7414207..87406081cf 100644 --- a/arch/arm/mach-kirkwood/include/mach/kw88f6281.h +++ b/arch/arm/mach-kirkwood/include/mach/kw88f6281.h @@ -15,8 +15,6 @@ #define KW_REGS_PHY_BASE KW88F6281_REGS_PHYS_BASE /* TCLK Core Clock definition */ -#ifndef CONFIG_SYS_TCLK #define CONFIG_SYS_TCLK 200000000 /* 200MHz */ -#endif #endif /* _ASM_ARCH_KW88F6281_H */ diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h index 3f3b15aa8a..8e8a405855 100644 --- a/arch/arm/mach-mvebu/include/mach/soc.h +++ b/arch/arm/mach-mvebu/include/mach/soc.h @@ -33,11 +33,6 @@ #define MV_88F68XX_A0_ID 0x4 #define MV_88F68XX_B0_ID 0xa -/* TCLK Core Clock definition */ -#ifndef CONFIG_SYS_TCLK -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ -#endif - /* SOC specific definations */ #define INTREG_BASE 0xd0000000 #define INTREG_BASE_ADDR_REG (INTREG_BASE + 0x20080) @@ -150,6 +145,9 @@ #define BOOT_FROM_UART 0x30 #define BOOT_FROM_SPI 0x38 + +#define CONFIG_SYS_TCLK ((readl(CONFIG_SAR_REG) & BIT(20)) ? \ + 200000000 : 166000000) #elif defined(CONFIG_ARMADA_38X) /* SAR values for Armada 38x */ #define CONFIG_SAR_REG (MVEBU_REGISTER(0x18600)) @@ -170,6 +168,9 @@ #define BOOT_FROM_SPI 0x32 #define BOOT_FROM_MMC 0x30 #define BOOT_FROM_MMC_ALT 0x31 + +#define CONFIG_SYS_TCLK ((readl(CONFIG_SAR_REG) & BIT(15)) ? \ + 200000000 : 250000000) #elif defined(CONFIG_ARMADA_MSYS) /* SAR values for MSYS */ #define CONFIG_SAR_REG (MBUS_DFX_BASE + 0xf8200) @@ -186,6 +187,8 @@ #define BOOT_FROM_NAND 0x1 #define BOOT_FROM_UART 0x2 #define BOOT_FROM_SPI 0x3 + +#define CONFIG_SYS_TCLK 200000000 /* 200MHz */ #else /* SAR values for Armada XP */ #define CONFIG_SAR_REG (MVEBU_REGISTER(0x18230)) @@ -205,6 +208,8 @@ #define BOOT_FROM_UART 0x2 #define BOOT_FROM_SPI 0x3 + +#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ #endif #endif /* _MVEBU_SOC_H */ diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c index 3b6bc38970..f0cf60bb14 100644 --- a/arch/arm/mach-mvebu/spl.c +++ b/arch/arm/mach-mvebu/spl.c @@ -345,7 +345,11 @@ void board_init_f(ulong dummy) serdes_phy_config(); /* Setup DDR */ - ddr3_init(); + ret = ddr3_init(); + if (ret) { + debug("ddr3_init() failed: %d\n", ret); + hang(); + } #endif /* Initialize Auto Voltage Scaling */ |