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author | Tom Rini <trini@konsulko.com> | 2021-09-01 01:37:25 +0300 |
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committer | Tom Rini <trini@konsulko.com> | 2021-09-01 01:37:25 +0300 |
commit | b15a17be0c75238e7bdb2c9baf0c375040d95952 (patch) | |
tree | bac3507ce20978255d168dbfec902f4ea87145bd /arch/arm | |
parent | 9b0583a839ab8b086b65b4762769abbe048a524d (diff) | |
parent | 221146c55868e0f1c1cd3d9add440081b677f559 (diff) | |
download | u-boot-b15a17be0c75238e7bdb2c9baf0c375040d95952.tar.xz |
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sh
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/dts/beacon-renesom-som.dtsi | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm/dts/beacon-renesom-som.dtsi b/arch/arm/dts/beacon-renesom-som.dtsi index 9565495b49..d30bab3c8b 100644 --- a/arch/arm/dts/beacon-renesom-som.dtsi +++ b/arch/arm/dts/beacon-renesom-som.dtsi @@ -7,6 +7,10 @@ #include <dt-bindings/clk/versaclock.h> / { + aliases { + spi0 = &rpc; + }; + memory@48000000 { device_type = "memory"; /* first 128MB is reserved for secure area. */ @@ -275,6 +279,25 @@ }; }; +&rpc { + compatible = "renesas,rcar-gen3-rpc"; + num-cs = <1>; + spi-max-frequency = <40000000>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + flash0: spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + compatible = "spi-flash", "jedec,spi-nor"; + spi-max-frequency = <40000000>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + }; +}; + &scif_clk { clock-frequency = <14745600>; }; |