Merge tag 'fsl-qoriq-2022-10-18' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq

Layerscape update
 - support sysreset,
 - de-select FSL_IFC when booting from SD
 - disable unused parts of ICID tables
 - reduce ns_dev size for csu
 - enable dma snooping for ls104x
 - nand driver fixups for ls1043ardb rev 7.0 boards.

6 files changed, 22 insertions, 5 deletions

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 8a7bbb4a65..ebca11d174 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -63,7 +63,7 @@ config ARCH_LS1043A
 	bool
 	select ARMV8_SET_SMPEN
 	select ARM_ERRATA_855873 if !TFABOOT
-	select FSL_IFC if TFABOOT || (!QSPI_BOOT && !SD_BOOT_QSPI)
+	select FSL_IFC if TFABOOT || (!QSPI_BOOT && !SD_BOOT_QSPI && !SD_BOOT)
 	select FSL_LAYERSCAPE
 	select FSL_LSCH2
 	select GICV2
@@ -100,7 +100,7 @@ config ARCH_LS1043A
 config ARCH_LS1046A
 	bool
 	select ARMV8_SET_SMPEN
-	select FSL_IFC if TFABOOT || (!QSPI_BOOT && !SD_BOOT_QSPI)
+	select FSL_IFC if TFABOOT || (!QSPI_BOOT && !SD_BOOT_QSPI && !SD_BOOT)
 	select FSL_LAYERSCAPE
 	select FSL_LSCH2
 	select GICV2
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index c989a43cbe..487c0ed553 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -1229,6 +1229,7 @@ int timer_init(void)
 	return 0;
 }
 
+#if !CONFIG_IS_ENABLED(SYSRESET)
 __efi_runtime_data u32 __iomem *rstcr = (u32 *)CONFIG_SYS_FSL_RST_ADDR;
 
 void __efi_runtime reset_cpu(void)
@@ -1248,6 +1249,7 @@ void __efi_runtime reset_cpu(void)
 	scfg_out32(rstcr, val);
 #endif
 }
+#endif
 
 #if defined(CONFIG_EFI_LOADER) && !defined(CONFIG_PSCI_RESET)
 
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/icid.c b/arch/arm/cpu/armv8/fsl-layerscape/icid.c
index 25cd82f16e..2d87281ec2 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/icid.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/icid.c
@@ -46,6 +46,7 @@ void set_icids(void)
 #endif
 }
 
+#ifndef CONFIG_SPL_BUILD
 int fdt_set_iommu_prop(void *blob, int off, int smmu_ph, u32 *ids, int num_ids)
 {
 	int i, ret;
@@ -190,3 +191,4 @@ void fdt_fixup_icid(void *blob)
 	fdt_fixup_fman_icids(blob, smmu_ph);
 #endif
 }
+#endif
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 926f8f21b6..515dbe02fd 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -682,7 +682,7 @@ void fsl_lsch2_early_init_f(void)
 			SCFG_SNPCNFGCR_USB1WRSNP | SCFG_SNPCNFGCR_USB2RDSNP |
 			SCFG_SNPCNFGCR_USB2WRSNP | SCFG_SNPCNFGCR_USB3RDSNP |
 			SCFG_SNPCNFGCR_USB3WRSNP | SCFG_SNPCNFGCR_SATARDSNP |
-			SCFG_SNPCNFGCR_SATAWRSNP);
+			SCFG_SNPCNFGCR_SATAWRSNP | SCFG_SNPCNFGCR_EDMASNP);
 #elif defined(CONFIG_ARCH_LS1012A)
 	setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SECRDSNP |
 			SCFG_SNPCNFGCR_SECWRSNP | SCFG_SNPCNFGCR_USB1RDSNP |
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h b/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
index 3c06a55cb8..8af0d35d27 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
@@ -12,11 +12,15 @@
 #include <asm/armv8/sec_firmware.h>
 
 struct icid_id_table {
+#ifndef CONFIG_SPL_BUILD
 	const char *compat;
-	u32 id;
-	u32 reg;
 	phys_addr_t compat_addr;
+#endif
 	phys_addr_t reg_addr;
+	u32 reg;
+#ifndef CONFIG_SPL_BUILD
+	u32 id;
+#endif
 	bool le;
 };
 
@@ -31,6 +35,13 @@ int fdt_set_iommu_prop(void *blob, int off, int smmu_ph, u32 *ids, int num_ids);
 void set_icids(void);
 void fdt_fixup_icid(void *blob);
 
+#ifdef CONFIG_SPL_BUILD
+#define SET_ICID_ENTRY(name, idA, regA, addr, compataddr, _le) \
+	{ .reg = regA, \
+	  .reg_addr = addr, \
+	  .le = _le \
+	}
+#else
 #define SET_ICID_ENTRY(name, idA, regA, addr, compataddr, _le) \
 	{ .compat = name, \
 	  .id = idA, \
@@ -39,6 +50,7 @@ void fdt_fixup_icid(void *blob);
 	  .reg_addr = addr, \
 	  .le = _le \
 	}
+#endif
 
 #ifdef CONFIG_SYS_FSL_SEC_LE
 #define SEC_IS_LE true
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index 1fb1191a65..2b73647ab4 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -383,6 +383,7 @@ struct ccsr_gur {
 #define SCFG_SNPCNFGCR_SATAWRSNP	0x00400000
 #define SCFG_SNPCNFGCR_USB1RDSNP	0x00200000
 #define SCFG_SNPCNFGCR_USB1WRSNP	0x00100000
+#define SCFG_SNPCNFGCR_EDMASNP		0x00020000
 #define SCFG_SNPCNFGCR_USB2RDSNP	0x00008000
 #define SCFG_SNPCNFGCR_USB2WRSNP	0x00010000
 #define SCFG_SNPCNFGCR_USB3RDSNP	0x00002000