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author | Rasmus Villemoes <rasmus.villemoes@prevas.dk> | 2022-10-06 15:56:50 +0300 |
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committer | Stefano Babic <sbabic@denx.de> | 2022-10-24 12:34:33 +0300 |
commit | c9473b2c37059e3c84d07fb663316c17c5480b53 (patch) | |
tree | 517dbefa7219c0e3ff2a89cd9e30a1a3164f0388 /arch/arm | |
parent | 727694b2ea28ce56f191daf40da7b4dd8f882366 (diff) | |
download | u-boot-c9473b2c37059e3c84d07fb663316c17c5480b53.tar.xz |
imx8m: fix reading of DDR4 MR registers [again]
Commit 290ffe5788 (imx8m: fix reading of DDR4 MR registers) lifted a
private definition of lpddr4_mr_read() from imx8mm-cl-iot-gate board
code to drivers/ddr/imx/imx8m/ddrphy_utils.c, because that version
actually seems to work in practice.
However, commit 99c7cc58e1 (ddr: imx: Add i.MX9 DDR controller driver)
reintroduced the broken version in drivers/ddr/imx/imx8m/ddr_init.c,
copied most of the rest of ddrphy_utils.c to
drivers/ddr/imx/phy/ddrphy_utils.c, and stopped building
drivers/ddr/imx/imx8m/ddrphy_utils.c [and that file was then finally
completely removed with 7e9bd84883 (imx8m: ddrphy_utils: Remove unused
file)].
I assume this must have broken the imx8mm-cl-iot-gate board, at least
those that have not had their eeprom programmed with the proper
information. It certainly did break our out-of-tree board which always
reads back the ID register and uses that for a sanity check.
So apply the fix from 290ffe5788 once again.
Fixes: 99c7cc58e1 (ddr: imx: Add i.MX9 DDR controller driver)
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Diffstat (limited to 'arch/arm')
0 files changed, 0 insertions, 0 deletions