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author | Angelo Durgehello <angelo.dureghello@timesys.com> | 2019-11-16 01:54:16 +0300 |
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committer | Tom Rini <trini@konsulko.com> | 2020-01-10 18:25:13 +0300 |
commit | ad420937558a9b3bc0e93d9693b34f57cf4480a0 (patch) | |
tree | e036131d4e2e6056dcf0398ca51542216e91d954 /arch/m68k/cpu/mcf5445x/cpu_init.c | |
parent | ff56f2b7263fae9132c13078ccd8d9604cf1e139 (diff) | |
download | u-boot-ad420937558a9b3bc0e93d9693b34f57cf4480a0.tar.xz |
m68k: add dm fec support
Add architecture-related code for dm fec support.
Signed-off-by: Angelo Durgehello <angelo.dureghello@timesys.com>
Diffstat (limited to 'arch/m68k/cpu/mcf5445x/cpu_init.c')
-rw-r--r-- | arch/m68k/cpu/mcf5445x/cpu_init.c | 16 |
1 files changed, 9 insertions, 7 deletions
diff --git a/arch/m68k/cpu/mcf5445x/cpu_init.c b/arch/m68k/cpu/mcf5445x/cpu_init.c index 9c5b8122a6..6ee23f0db2 100644 --- a/arch/m68k/cpu/mcf5445x/cpu_init.c +++ b/arch/m68k/cpu/mcf5445x/cpu_init.c @@ -402,15 +402,18 @@ void uart_port_conf(int port) } #if defined(CONFIG_CMD_NET) -int fecpin_setclear(struct eth_device *dev, int setclear) +int fecpin_setclear(fec_info_t *info, int setclear) { gpio_t *gpio = (gpio_t *) MMAP_GPIO; -#ifdef CONFIG_MCF5445x - struct fec_info_s *info = (struct fec_info_s *)dev->priv; + u32 fec0_base; + + if (fec_get_base_addr(0, &fec0_base)) + return -1; +#ifdef CONFIG_MCF5445x if (setclear) { #ifdef CONFIG_SYS_FEC_NO_SHARED_PHY - if (info->iobase == CONFIG_SYS_FEC0_IOBASE) + if (info->iobase == fec0_base) setbits_be16(&gpio->par_feci2c, GPIO_PAR_FECI2C_MDC0_MDC0 | GPIO_PAR_FECI2C_MDIO0_MDIO0); @@ -423,7 +426,7 @@ int fecpin_setclear(struct eth_device *dev, int setclear) GPIO_PAR_FECI2C_MDC0_MDC0 | GPIO_PAR_FECI2C_MDIO0_MDIO0); #endif - if (info->iobase == CONFIG_SYS_FEC0_IOBASE) + if (info->iobase == fec0_base) setbits_8(&gpio->par_fec, GPIO_PAR_FEC_FEC0_RMII_GPIO); else setbits_8(&gpio->par_fec, GPIO_PAR_FEC_FEC1_RMII_ATA); @@ -431,7 +434,7 @@ int fecpin_setclear(struct eth_device *dev, int setclear) clrbits_be16(&gpio->par_feci2c, GPIO_PAR_FECI2C_MDC0_MDC0 | GPIO_PAR_FECI2C_MDIO0_MDIO0); - if (info->iobase == CONFIG_SYS_FEC0_IOBASE) { + if (info->iobase == fec0_base) { #ifdef CONFIG_SYS_FEC_FULL_MII setbits_8(&gpio->par_fec, GPIO_PAR_FEC_FEC0_MII); #else @@ -463,4 +466,3 @@ int fecpin_setclear(struct eth_device *dev, int setclear) return 0; } #endif - |