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authorTom Rini <trini@konsulko.com>2021-07-12 19:42:11 +0300
committerTom Rini <trini@konsulko.com>2021-07-19 04:03:57 +0300
commit563cae7c46ba9e6835310e1fbe7a4d3a0d996d2b (patch)
treec6b695f35d84d00eeef7274e846c67e364805931 /arch/m68k/cpu
parent011e86a8bf8c8dbcb747906969075d500a1fed54 (diff)
downloadu-boot-563cae7c46ba9e6835310e1fbe7a4d3a0d996d2b.tar.xz
m68k: Remove M54455EVB board
This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Angelo Durgehello <angelo.dureghello@timesys.com> Cc: TsiChung Liew <Tsi-Chung.Liew@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/m68k/cpu')
-rw-r--r--arch/m68k/cpu/mcf5445x/speed.c19
1 files changed, 0 insertions, 19 deletions
diff --git a/arch/m68k/cpu/mcf5445x/speed.c b/arch/m68k/cpu/mcf5445x/speed.c
index a0b9af8866..4809bb49d1 100644
--- a/arch/m68k/cpu/mcf5445x/speed.c
+++ b/arch/m68k/cpu/mcf5445x/speed.c
@@ -141,9 +141,6 @@ void setup_5445x_clocks(void)
int bPci;
#endif
-#ifdef CONFIG_M54455EVB
- u8 *cpld = (u8 *)(CONFIG_SYS_CS2_BASE + 3);
-#endif
u8 bootmode;
/* To determine PCI is present or not */
@@ -163,22 +160,6 @@ void setup_5445x_clocks(void)
#endif
}
-#ifdef CONFIG_M54455EVB
- bootmode = (in_8(cpld) & 0x03);
-
- if (bootmode != 3) {
- /* Temporary read from CCR- fixed fb issue, must be the same clock
- as pci or input clock, causing cpld/fpga read inconsistancy */
- fbtemp = pPllmult[ccm->ccr & fbpll_mask];
-
- /* Break down into small pieces, code still in flex bus */
- pcrvalue = in_be32(&pll->pcr) & 0xFFFFF0FF;
- temp = fbtemp - 1;
- pcrvalue |= PLL_PCR_OUTDIV3(temp);
-
- out_be32(&pll->pcr, pcrvalue);
- }
-#endif
#ifdef CONFIG_M54451EVB
/* No external logic to read the bootmode, hard coded from built */
#ifdef CONFIG_CF_SBF