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| author | Ramon Fried <rfried.dev@gmail.com> | 2019-06-10 21:05:26 +0300 |
|---|---|---|
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2019-10-25 18:20:43 +0300 |
| commit | 22247c63ac4ebed8bbaafe1e717c1de7600a0883 (patch) | |
| tree | 644116791d21122362e355458e054bc20ebe838d /arch/mips/Kconfig | |
| parent | 17fd9915a4c639381804ed28274fa136ae3b0bee (diff) | |
| download | u-boot-22247c63ac4ebed8bbaafe1e717c1de7600a0883.tar.xz | |
MIPS: add compile time definition of L2 cache size
If configuration is set to skip low level init, automatic
probe of L2 cache size is not performed and the size is set to 0.
Flushing or invalidating the L2 cache will fail in this case.
Add a static configuration (SYS_DCACHE_LINE_SIZE) with default set to 0.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Diffstat (limited to 'arch/mips/Kconfig')
| -rw-r--r-- | arch/mips/Kconfig | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index e3e7945567..f5d81b822c 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -408,9 +408,17 @@ config SYS_ICACHE_LINE_SIZE help The size of L1 Icache lines, if known at compile time. +config SYS_SCACHE_LINE_SIZE + int + default 0 + help + The size of L2 cache lines, if known at compile time. + + config SYS_CACHE_SIZE_AUTO def_bool y if SYS_DCACHE_SIZE = 0 && SYS_ICACHE_SIZE = 0 && \ - SYS_DCACHE_LINE_SIZE = 0 && SYS_ICACHE_LINE_SIZE = 0 + SYS_DCACHE_LINE_SIZE = 0 && SYS_ICACHE_LINE_SIZE = 0 && \ + SYS_SCACHE_LINE_SIZE = 0 help Select this (or let it be auto-selected by not defining any cache sizes) in order to allow U-Boot to automatically detect the sizes |