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author | Tom Rini <trini@konsulko.com> | 2021-01-06 00:20:26 +0300 |
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committer | Tom Rini <trini@konsulko.com> | 2021-01-06 00:20:26 +0300 |
commit | 720620e6916ba40b9a173bb07706d2c73f3c23e7 (patch) | |
tree | b085821f1d1137d80e9bb73f405ea0680db338b9 /arch/mips/cpu/start.S | |
parent | c86b18074c9d40bfa63cda1068b6dfb810d4377d (diff) | |
parent | 62b07b5173e3d04fabfac42cf1f4779d021f94ad (diff) | |
download | u-boot-720620e6916ba40b9a173bb07706d2c73f3c23e7.tar.xz |
Merge tag 'v2021.01-rc5' into next
Prepare v2021.01-rc5
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/mips/cpu/start.S')
-rw-r--r-- | arch/mips/cpu/start.S | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/arch/mips/cpu/start.S b/arch/mips/cpu/start.S index d0c412236d..335aafa6a8 100644 --- a/arch/mips/cpu/start.S +++ b/arch/mips/cpu/start.S @@ -74,9 +74,14 @@ .endm ENTRY(_start) - /* U-Boot entry point */ + /* + * U-Boot entry point. + * Do not add instructions to the branch delay slot! Some SoC's + * like Octeon might patch the final U-Boot binary at this location + * with additional boot headers. + */ b reset - mtc0 zero, CP0_COUNT # clear cp0 count for most accurate boot timing + nop #if defined(CONFIG_MIPS_INSERT_BOOT_CONFIG) /* @@ -123,6 +128,7 @@ ENTRY(_start) #endif reset: + mtc0 zero, CP0_COUNT # clear cp0 count for most accurate boot timing #if __mips_isa_rev >= 6 mfc0 t0, CP0_CONFIG, 5 and t0, t0, MIPS_CONF5_VP |