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authorStefan Roese <sr@denx.de>2018-08-16 16:27:31 +0300
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>2018-09-23 15:27:51 +0300
commit88dc40991494951015978b381bc37899fd9971d4 (patch)
treef3118a6ac9c00ba805c5120118167c976911ee8a /arch/mips/dts/gardena-smart-gateway-mt7688.dts
parentb02f76a83541fe9fe3a2918039b26fc133699c17 (diff)
downloadu-boot-88dc40991494951015978b381bc37899fd9971d4.tar.xz
mips: Add Gardena Smart-Gateway board support
The Gardena Smart-Gateway boards have a MT7688 SoC with 128 MiB of RAM and 8 MiB of flash (SPI NOR) and additional 128MiB SPI NAND storage. This patch also includes 2 targets. One is the target that can be programmed into the SPI NOR flash and a 2nd target "xxx-ram" is added to support loading and booting via an already running U-Boot version. This allows easy development and testing without the need to flash the image each time. Signed-off-by: Stefan Roese <sr@denx.de> [fixed and regenerated defconfig files] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Diffstat (limited to 'arch/mips/dts/gardena-smart-gateway-mt7688.dts')
-rw-r--r--arch/mips/dts/gardena-smart-gateway-mt7688.dts54
1 files changed, 54 insertions, 0 deletions
diff --git a/arch/mips/dts/gardena-smart-gateway-mt7688.dts b/arch/mips/dts/gardena-smart-gateway-mt7688.dts
new file mode 100644
index 0000000000..ee99c3d17c
--- /dev/null
+++ b/arch/mips/dts/gardena-smart-gateway-mt7688.dts
@@ -0,0 +1,54 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2018 Stefan Roese <sr@denx.de>
+ */
+
+/dts-v1/;
+
+#include "mt7628a.dtsi"
+
+/ {
+ compatible = "gardena,smart-gateway-mt7688", "ralink,mt7628a-soc";
+ model = "Gardena smart-Gateway-MT7688";
+
+ aliases {
+ serial0 = &uart0;
+ spi0 = &spi0;
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x08000000>;
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,57600";
+ stdout-path = &uart0;
+ };
+};
+
+&uart0 {
+ status = "okay";
+ clock-frequency = <40000000>;
+};
+
+&spi0 {
+ status = "okay";
+ num-cs = <2>;
+
+ spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spi-flash", "jedec,spi-nor";
+ spi-max-frequency = <40000000>;
+ reg = <0>;
+ };
+
+ spi-nand@1 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spi-nand";
+ spi-max-frequency = <40000000>;
+ reg = <1>;
+ };
+};