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| author | Stefan Roese <sr@denx.de> | 2020-08-24 14:04:41 +0300 |
|---|---|---|
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2020-10-07 21:25:57 +0300 |
| commit | 399b867fac244c4506f0a9365e7d53bfe74e66b4 (patch) | |
| tree | 5c7daceb9db57f5d6385535998b41f80dae2795b /arch/mips/dts | |
| parent | b28d35234cc2cbb68fb1bd0aa0a40323834ee454 (diff) | |
| download | u-boot-399b867fac244c4506f0a9365e7d53bfe74e66b4.tar.xz | |
mips: octeon: cache.c: Flush all pending writes in flush_dcache_range()
As noticed while working on the USB xHCI support, Octeon needs to flush
all pending writes so that the values are present in the memory. Add
this "syncw" instruction (twice) to flush_dcache_range().
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'arch/mips/dts')
0 files changed, 0 insertions, 0 deletions