diff options
| author | Ramon Fried <rfried.dev@gmail.com> | 2019-06-10 21:05:26 +0300 |
|---|---|---|
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2019-10-25 18:20:43 +0300 |
| commit | 22247c63ac4ebed8bbaafe1e717c1de7600a0883 (patch) | |
| tree | 644116791d21122362e355458e054bc20ebe838d /arch/mips/lib | |
| parent | 17fd9915a4c639381804ed28274fa136ae3b0bee (diff) | |
| download | u-boot-22247c63ac4ebed8bbaafe1e717c1de7600a0883.tar.xz | |
MIPS: add compile time definition of L2 cache size
If configuration is set to skip low level init, automatic
probe of L2 cache size is not performed and the size is set to 0.
Flushing or invalidating the L2 cache will fail in this case.
Add a static configuration (SYS_DCACHE_LINE_SIZE) with default set to 0.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Diffstat (limited to 'arch/mips/lib')
| -rw-r--r-- | arch/mips/lib/cache.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c index d56fd1e0f4..0ddae30f2c 100644 --- a/arch/mips/lib/cache.c +++ b/arch/mips/lib/cache.c @@ -87,7 +87,7 @@ static inline unsigned long scache_line_size(void) #ifdef CONFIG_MIPS_L2_CACHE return gd->arch.l2_line_size; #else - return 0; + return CONFIG_SYS_SCACHE_LINE_SIZE; #endif } |