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| author | Simon Glass <sjg@chromium.org> | 2023-02-06 01:40:22 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2023-02-10 15:41:39 +0300 |
| commit | 60b0002e25d15eba060160244b05250cf312ad49 (patch) | |
| tree | b0d441b66d5f9440ec1e1105765b1fb476a29ae1 /arch/mips/mach-octeon/cpu.c | |
| parent | f00d58010de5cc79511cffaebb52eb90b31e2293 (diff) | |
| download | u-boot-60b0002e25d15eba060160244b05250cf312ad49.tar.xz | |
Correct SPL use of OCTEON_SERIAL_BOOTCMD
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_OCTEON_SERIAL_BOOTCMD defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/mips/mach-octeon/cpu.c')
| -rw-r--r-- | arch/mips/mach-octeon/cpu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/mach-octeon/cpu.c b/arch/mips/mach-octeon/cpu.c index 1bdc6cd729..5adf4ba32c 100644 --- a/arch/mips/mach-octeon/cpu.c +++ b/arch/mips/mach-octeon/cpu.c @@ -451,7 +451,7 @@ int arch_misc_init(void) if (CONFIG_IS_ENABLED(OCTEON_SERIAL_PCIE_CONSOLE)) init_pcie_console(); - if (CONFIG_IS_ENABLED(OCTEON_SERIAL_BOOTCMD)) + if (IS_ENABLED(CONFIG_OCTEON_SERIAL_BOOTCMD)) init_bootcmd_console(); return 0; |