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| author | Simon Glass <sjg@chromium.org> | 2023-02-06 01:40:23 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2023-02-10 15:41:39 +0300 |
| commit | 7032fa28fdad988b89127daa9241d1b9024a9994 (patch) | |
| tree | f316f4ab317b3d0dcf74c873420ac3d6ba661d2c /arch/mips/mach-octeon/cpu.c | |
| parent | 60b0002e25d15eba060160244b05250cf312ad49 (diff) | |
| download | u-boot-7032fa28fdad988b89127daa9241d1b9024a9994.tar.xz | |
Correct SPL use of OCTEON_SERIAL_PCIE_CONSOLE
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_OCTEON_SERIAL_PCIE_CONSOLE defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/mips/mach-octeon/cpu.c')
| -rw-r--r-- | arch/mips/mach-octeon/cpu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/mach-octeon/cpu.c b/arch/mips/mach-octeon/cpu.c index 5adf4ba32c..c7744e8470 100644 --- a/arch/mips/mach-octeon/cpu.c +++ b/arch/mips/mach-octeon/cpu.c @@ -448,7 +448,7 @@ int arch_misc_init(void) if (ret) return ret; - if (CONFIG_IS_ENABLED(OCTEON_SERIAL_PCIE_CONSOLE)) + if (IS_ENABLED(CONFIG_OCTEON_SERIAL_PCIE_CONSOLE)) init_pcie_console(); if (IS_ENABLED(CONFIG_OCTEON_SERIAL_BOOTCMD)) |