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authorAaron Williams <awilliams@marvell.com>2020-12-11 19:05:48 +0300
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>2021-04-23 22:02:12 +0300
commitd96ed60b1707fed1203eeaa9a15d78868bb307c6 (patch)
treeaf5888833ece3f58af1f05657971858f255597eb /arch/mips/mach-octeon/include/mach/cvmx-rst-defs.h
parent4bfe497d290c764ea071186ffa8c45b972cfe043 (diff)
downloadu-boot-d96ed60b1707fed1203eeaa9a15d78868bb307c6.tar.xz
mips: octeon: Add cvmx-rst-defs.h header file
Import cvmx-rst-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'arch/mips/mach-octeon/include/mach/cvmx-rst-defs.h')
-rw-r--r--arch/mips/mach-octeon/include/mach/cvmx-rst-defs.h77
1 files changed, 77 insertions, 0 deletions
diff --git a/arch/mips/mach-octeon/include/mach/cvmx-rst-defs.h b/arch/mips/mach-octeon/include/mach/cvmx-rst-defs.h
new file mode 100644
index 0000000000..943e160105
--- /dev/null
+++ b/arch/mips/mach-octeon/include/mach/cvmx-rst-defs.h
@@ -0,0 +1,77 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2020 Marvell International Ltd.
+ */
+
+#ifndef __CVMX_RST_DEFS_H__
+#define __CVMX_RST_DEFS_H__
+
+#define CVMX_RST_CTLX(offset) (0x0001180006001640ull + ((offset) & 3) * 8)
+#define CVMX_RST_SOFT_PRSTX(offset) (0x00011800060016C0ull + ((offset) & 3) * 8)
+
+/**
+ * cvmx_rst_ctl#
+ */
+union cvmx_rst_ctlx {
+ u64 u64;
+ struct cvmx_rst_ctlx_s {
+ u64 reserved_10_63 : 54;
+ u64 prst_link : 1;
+ u64 rst_done : 1;
+ u64 rst_link : 1;
+ u64 host_mode : 1;
+ u64 reserved_4_5 : 2;
+ u64 rst_drv : 1;
+ u64 rst_rcv : 1;
+ u64 rst_chip : 1;
+ u64 rst_val : 1;
+ } s;
+ struct cvmx_rst_ctlx_s cn70xx;
+ struct cvmx_rst_ctlx_s cn70xxp1;
+ struct cvmx_rst_ctlx_s cn73xx;
+ struct cvmx_rst_ctlx_s cn78xx;
+ struct cvmx_rst_ctlx_s cn78xxp1;
+ struct cvmx_rst_ctlx_s cnf75xx;
+};
+
+typedef union cvmx_rst_ctlx cvmx_rst_ctlx_t;
+
+/**
+ * cvmx_rst_soft_prst#
+ */
+union cvmx_rst_soft_prstx {
+ u64 u64;
+ struct cvmx_rst_soft_prstx_s {
+ u64 reserved_1_63 : 63;
+ u64 soft_prst : 1;
+ } s;
+ struct cvmx_rst_soft_prstx_s cn70xx;
+ struct cvmx_rst_soft_prstx_s cn70xxp1;
+ struct cvmx_rst_soft_prstx_s cn73xx;
+ struct cvmx_rst_soft_prstx_s cn78xx;
+ struct cvmx_rst_soft_prstx_s cn78xxp1;
+ struct cvmx_rst_soft_prstx_s cnf75xx;
+};
+
+typedef union cvmx_rst_soft_prstx cvmx_rst_soft_prstx_t;
+
+/**
+ * cvmx_rst_soft_rst
+ */
+union cvmx_rst_soft_rst {
+ u64 u64;
+ struct cvmx_rst_soft_rst_s {
+ u64 reserved_1_63 : 63;
+ u64 soft_rst : 1;
+ } s;
+ struct cvmx_rst_soft_rst_s cn70xx;
+ struct cvmx_rst_soft_rst_s cn70xxp1;
+ struct cvmx_rst_soft_rst_s cn73xx;
+ struct cvmx_rst_soft_rst_s cn78xx;
+ struct cvmx_rst_soft_rst_s cn78xxp1;
+ struct cvmx_rst_soft_rst_s cnf75xx;
+};
+
+typedef union cvmx_rst_soft_rst cvmx_rst_soft_rst_t;
+
+#endif