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| author | Tom Rini <trini@konsulko.com> | 2021-08-28 04:18:30 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-09-01 00:47:49 +0300 |
| commit | a2ac2b964bfbb20d6791ee94b9034a50cfadb5b0 (patch) | |
| tree | 9ab0cc43b3abf55efbab3014e5a0d818a7c5f051 /arch/mips | |
| parent | ab92b38a0161f0d8efa1c2112d944ef8f755dfbe (diff) | |
| download | u-boot-a2ac2b964bfbb20d6791ee94b9034a50cfadb5b0.tar.xz | |
Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig
This converts the following to Kconfig:
CONFIG_SKIP_LOWLEVEL_INIT
CONFIG_SKIP_LOWLEVEL_INIT_ONLY
In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/cpu/start.S | 4 | ||||
| -rw-r--r-- | arch/mips/mach-mtmips/mt7628/lowlevel_init.S | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/arch/mips/cpu/start.S b/arch/mips/cpu/start.S index 335aafa6a8..47251a5b92 100644 --- a/arch/mips/cpu/start.S +++ b/arch/mips/cpu/start.S @@ -233,7 +233,7 @@ wr_done: # endif #endif -#ifndef CONFIG_SKIP_LOWLEVEL_INIT +#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) # ifdef CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD /* Initialize any external memory */ PTR_LA t9, lowlevel_init @@ -254,7 +254,7 @@ wr_done: nop #endif -#ifndef CONFIG_SKIP_LOWLEVEL_INIT +#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) # ifndef CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD /* Initialize any external memory */ PTR_LA t9, lowlevel_init diff --git a/arch/mips/mach-mtmips/mt7628/lowlevel_init.S b/arch/mips/mach-mtmips/mt7628/lowlevel_init.S index e4a6c03580..83cd8fa9b6 100644 --- a/arch/mips/mach-mtmips/mt7628/lowlevel_init.S +++ b/arch/mips/mach-mtmips/mt7628/lowlevel_init.S @@ -28,7 +28,7 @@ .set noreorder LEAF(mips_sram_init) -#ifndef CONFIG_SKIP_LOWLEVEL_INIT +#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) /* Setup CPU PLL */ li t0, DELAY_USEC(1000000) li t1, KSEG1ADDR(SYSCTL_BASE + SYSCTL_ROM_STATUS_REG) @@ -116,7 +116,7 @@ _cpu_pll_done: sub a1, CONFIG_SYS_DCACHE_LINE_SIZE bnez a1, 3b nop -#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ +#endif /* CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) */ jr ra nop |