Merge git://git.denx.de/u-boot-mips

6 files changed, 528 insertions, 0 deletions

diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
index a190485ded..840dbf170d 100644
--- a/arch/mips/dts/Makefile
+++ b/arch/mips/dts/Makefile
@@ -8,9 +8,11 @@ dtb-$(CONFIG_TARGET_BOSTON) += img,boston.dtb
 dtb-$(CONFIG_TARGET_MALTA) += mti,malta.dtb
 dtb-$(CONFIG_TARGET_PIC32MZDASK) += pic32mzda_sk.dtb
 dtb-$(CONFIG_TARGET_XILFPGA) += nexys4ddr.dtb
+dtb-$(CONFIG_BOARD_COMTREND_AR5315U) += comtrend,ar-5315u.dtb
 dtb-$(CONFIG_BOARD_COMTREND_AR5387UN) += comtrend,ar-5387un.dtb
 dtb-$(CONFIG_BOARD_COMTREND_CT5361) += comtrend,ct-5361.dtb
 dtb-$(CONFIG_BOARD_COMTREND_VR3032U) += comtrend,vr-3032u.dtb
+dtb-$(CONFIG_BOARD_COMTREND_WAP5813N) += comtrend,wap-5813n.dtb
 dtb-$(CONFIG_BOARD_HUAWEI_HG556A) += huawei,hg556a.dtb
 dtb-$(CONFIG_BOARD_NETGEAR_CG3100D) += netgear,cg3100d.dtb
 dtb-$(CONFIG_BOARD_SAGEM_FAST1704) += sagem,f@st1704.dtb
diff --git a/arch/mips/dts/brcm,bcm6318.dtsi b/arch/mips/dts/brcm,bcm6318.dtsi
new file mode 100644
index 0000000000..54964a7009
--- /dev/null
+++ b/arch/mips/dts/brcm,bcm6318.dtsi
@@ -0,0 +1,157 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <dt-bindings/clock/bcm6318-clock.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/power-domain/bcm6318-power-domain.h>
+#include <dt-bindings/reset/bcm6318-reset.h>
+#include "skeleton.dtsi"
+
+/ {
+	compatible = "brcm,bcm6318";
+
+	aliases {
+		spi0 = &spi;
+	};
+
+	cpus {
+		reg = <0x10000000 0x4>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		u-boot,dm-pre-reloc;
+
+		cpu@0 {
+			compatible = "brcm,bcm6318-cpu", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <0>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+
+	clocks {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		u-boot,dm-pre-reloc;
+
+		hsspi_pll: hsspi-pll {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <250000000>;
+		};
+
+		periph_osc: periph-osc {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <50000000>;
+			u-boot,dm-pre-reloc;
+		};
+
+		periph_clk: periph-clk {
+			compatible = "brcm,bcm6345-clk";
+			reg = <0x10000004 0x4>;
+			#clock-cells = <1>;
+		};
+	};
+
+	ubus {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		u-boot,dm-pre-reloc;
+
+		periph_rst: reset-controller@10000010 {
+			compatible = "brcm,bcm6345-reset";
+			reg = <0x10000010 0x4>;
+			#reset-cells = <1>;
+		};
+
+		wdt: watchdog@10000068 {
+			compatible = "brcm,bcm6345-wdt";
+			reg = <0x10000068 0xc>;
+			clocks = <&periph_osc>;
+		};
+
+		wdt-reboot {
+			compatible = "wdt-reboot";
+			wdt = <&wdt>;
+		};
+
+		pll_cntl: syscon@10000074 {
+			compatible = "syscon";
+			reg = <0x10000074 0x4>;
+		};
+
+		syscon-reboot {
+			compatible = "syscon-reboot";
+			regmap = <&pll_cntl>;
+			offset = <0x0>;
+			mask = <0x1>;
+		};
+
+		gpio1: gpio-controller@10000080 {
+			compatible = "brcm,bcm6345-gpio";
+			reg = <0x10000080 0x4>, <0x10000088 0x4>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			ngpios = <18>;
+
+			status = "disabled";
+		};
+
+		gpio0: gpio-controller@10000084 {
+			compatible = "brcm,bcm6345-gpio";
+			reg = <0x10000084 0x4>, <0x1000008c 0x4>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			status = "disabled";
+		};
+
+		uart0: serial@10000100 {
+			compatible = "brcm,bcm6345-uart";
+			reg = <0x10000100 0x18>;
+			clocks = <&periph_osc>;
+
+			status = "disabled";
+		};
+
+		leds: led-controller@10000200 {
+			compatible = "brcm,bcm6328-leds";
+			reg = <0x10000200 0x28>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			status = "disabled";
+		};
+
+		periph_pwr: power-controller@100008e8 {
+			compatible = "brcm,bcm6328-power-domain";
+			reg = <0x100008e8 0x4>;
+			#power-domain-cells = <1>;
+		};
+
+		spi: spi@10003000 {
+			compatible = "brcm,bcm6328-hsspi";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x10003000 0x600>;
+			clocks = <&periph_clk BCM6318_CLK_HSSPI>, <&hsspi_pll>;
+			clock-names = "hsspi", "pll";
+			resets = <&periph_rst BCM6318_RST_SPI>;
+			spi-max-frequency = <33333334>;
+			num-cs = <3>;
+
+			status = "disabled";
+		};
+
+		memory-controller@10004000 {
+			compatible = "brcm,bcm6318-mc";
+			reg = <0x10004000 0x38>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+};
diff --git a/arch/mips/dts/brcm,bcm6368.dtsi b/arch/mips/dts/brcm,bcm6368.dtsi
new file mode 100644
index 0000000000..1bb538a1f3
--- /dev/null
+++ b/arch/mips/dts/brcm,bcm6368.dtsi
@@ -0,0 +1,168 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <dt-bindings/clock/bcm6368-clock.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/reset/bcm6368-reset.h>
+#include "skeleton.dtsi"
+
+/ {
+	compatible = "brcm,bcm6368";
+
+	aliases {
+		spi0 = &spi;
+	};
+
+	cpus {
+		reg = <0x10000000 0x4>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		u-boot,dm-pre-reloc;
+
+		cpu@0 {
+			compatible = "brcm,bcm6368-cpu", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <0>;
+			u-boot,dm-pre-reloc;
+		};
+
+		cpu@1 {
+			compatible = "brcm,bcm6368-cpu", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <1>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+
+	clocks {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		u-boot,dm-pre-reloc;
+
+		periph_osc: periph-osc {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <50000000>;
+			u-boot,dm-pre-reloc;
+		};
+
+		periph_clk: periph-clk {
+			compatible = "brcm,bcm6345-clk";
+			reg = <0x10000004 0x4>;
+			#clock-cells = <1>;
+		};
+	};
+
+	pflash: nor@18000000 {
+		compatible = "cfi-flash";
+		reg = <0x18000000 0x2000000>;
+		bank-width = <2>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		status = "disabled";
+	};
+
+	ubus {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		u-boot,dm-pre-reloc;
+
+		pll_cntl: syscon@10000008 {
+			compatible = "syscon";
+			reg = <0x10000008 0x4>;
+		};
+
+		syscon-reboot {
+			compatible = "syscon-reboot";
+			regmap = <&pll_cntl>;
+			offset = <0x0>;
+			mask = <0x1>;
+		};
+
+		periph_rst: reset-controller@10000010 {
+			compatible = "brcm,bcm6345-reset";
+			reg = <0x10000010 0x4>;
+			#reset-cells = <1>;
+		};
+
+		wdt: watchdog@1000005c {
+			compatible = "brcm,bcm6345-wdt";
+			reg = <0x1000005c 0xc>;
+			clocks = <&periph_osc>;
+		};
+
+		wdt-reboot {
+			compatible = "wdt-reboot";
+			wdt = <&wdt>;
+		};
+
+		gpio1: gpio-controller@10000080 {
+			compatible = "brcm,bcm6345-gpio";
+			reg = <0x10000080 0x4>, <0x10000088 0x4>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			ngpios = <6>;
+
+			status = "disabled";
+		};
+
+		gpio0: gpio-controller@10000084 {
+			compatible = "brcm,bcm6345-gpio";
+			reg = <0x10000084 0x4>, <0x1000008c 0x4>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			status = "disabled";
+		};
+
+		leds: led-controller@100000d0 {
+			compatible = "brcm,bcm6358-leds";
+			reg = <0x100000d0 0x8>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			status = "disabled";
+		};
+
+		uart0: serial@10000100 {
+			compatible = "brcm,bcm6345-uart";
+			reg = <0x10000100 0x18>;
+			clocks = <&periph_osc>;
+
+			status = "disabled";
+		};
+
+		uart1: serial@10000120 {
+			compatible = "brcm,bcm6345-uart";
+			reg = <0x10000120 0x18>;
+			clocks = <&periph_osc>;
+
+			status = "disabled";
+		};
+
+		spi: spi@10000800 {
+			compatible = "brcm,bcm6358-spi";
+			reg = <0x10000800 0x70c>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			clocks = <&periph_clk BCM6368_CLK_SPI>;
+			resets = <&periph_rst BCM6368_RST_SPI>;
+			spi-max-frequency = <20000000>;
+			num-cs = <6>;
+
+			status = "disabled";
+		};
+
+		memory-controller@10001200 {
+			compatible = "brcm,bcm6358-mc";
+			reg = <0x10001200 0x4c>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+};
diff --git a/arch/mips/dts/comtrend,ar-5315u.dts b/arch/mips/dts/comtrend,ar-5315u.dts
new file mode 100644
index 0000000000..4e4d69b638
--- /dev/null
+++ b/arch/mips/dts/comtrend,ar-5315u.dts
@@ -0,0 +1,85 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "brcm,bcm6318.dtsi"
+
+/ {
+	model = "Comtrend AR-5315u";
+	compatible = "comtrend,ar5315-un", "brcm,bcm6318";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&leds {
+	status = "okay";
+
+	led@0 {
+		reg = <0>;
+		active-low;
+		label = "AR-5315u:green:wps";
+	};
+
+	led@1 {
+		reg = <1>;
+		active-low;
+		label = "AR-5315u:green:power";
+	};
+
+	led@2 {
+		reg = <2>;
+		active-low;
+		label = "AR-5315u:green:usb";
+	};
+
+	led@8 {
+		reg = <8>;
+		active-low;
+		label = "AR-5315u:green:inet";
+	};
+
+	led@9 {
+		reg = <9>;
+		active-low;
+		label = "AR-5315u:red:inet";
+	};
+
+	led@10 {
+		reg = <10>;
+		active-low;
+		label = "AR-5315u:green:dsl";
+	};
+
+	led@11 {
+		reg = <11>;
+		active-low;
+		label = "AR-5315u:red:power";
+	};
+};
+
+&spi {
+	status = "okay";
+
+	spi-flash@0 {
+		compatible = "spi-flash";
+		reg = <0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		spi-max-frequency = <62500000>;
+	};
+};
+
+&uart0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
diff --git a/arch/mips/dts/comtrend,wap-5813n.dts b/arch/mips/dts/comtrend,wap-5813n.dts
new file mode 100644
index 0000000000..29386e2662
--- /dev/null
+++ b/arch/mips/dts/comtrend,wap-5813n.dts
@@ -0,0 +1,65 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "brcm,bcm6368.dtsi"
+
+/ {
+	model = "Comtrend WAP-5813n";
+	compatible = "comtrend,wap-5813n", "brcm,bcm6368";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		inet_green {
+			label = "WAP-5813n:green:inet";
+			gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
+		};
+
+		power_green {
+			label = "WAP-5813n:green:power";
+			gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
+			default-state = "on";
+		};
+
+		wps_green {
+			label = "WAP-5813n:green:wps";
+			gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
+		};
+
+		power_red {
+			label = "WAP-5813n:red:power";
+			gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>;
+		};
+
+		inet_red {
+			label = "WAP-5813n:red:inet";
+			gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&pflash {
+	status = "okay";
+};
+
+&uart0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
diff --git a/arch/mips/mach-bmips/Kconfig b/arch/mips/mach-bmips/Kconfig
index e3e1da3c28..e4a0118368 100644
--- a/arch/mips/mach-bmips/Kconfig
+++ b/arch/mips/mach-bmips/Kconfig
@@ -1,12 +1,17 @@
 menu "Broadcom MIPS platforms"
 	depends on ARCH_BMIPS
 
+config SYS_MALLOC_F_LEN
+	default 0x1000
+
 config SYS_SOC
 	default "bcm3380" if SOC_BMIPS_BCM3380
+	default "bcm6318" if SOC_BMIPS_BCM6318
 	default "bcm6328" if SOC_BMIPS_BCM6328
 	default "bcm6338" if SOC_BMIPS_BCM6338
 	default "bcm6348" if SOC_BMIPS_BCM6348
 	default "bcm6358" if SOC_BMIPS_BCM6358
+	default "bcm6368" if SOC_BMIPS_BCM6368
 	default "bcm63268" if SOC_BMIPS_BCM63268
 
 choice
@@ -23,6 +28,17 @@ config SOC_BMIPS_BCM3380
 	help
 	  This supports BMIPS BCM3380 family.
 
+config SOC_BMIPS_BCM6318
+	bool "BMIPS BCM6318 family"
+	select SUPPORTS_BIG_ENDIAN
+	select SUPPORTS_CPU_MIPS32_R1
+	select MIPS_TUNE_4KC
+	select MIPS_L1_CACHE_SHIFT_4
+	select SWAP_IO_SPACE
+	select SYSRESET_SYSCON
+	help
+	  This supports BMIPS BCM6318 family.
+
 config SOC_BMIPS_BCM6328
 	bool "BMIPS BCM6328 family"
 	select SUPPORTS_BIG_ENDIAN
@@ -67,6 +83,17 @@ config SOC_BMIPS_BCM6358
 	help
 	  This supports BMIPS BCM6358 family including BCM6358 and BCM6359.
 
+config SOC_BMIPS_BCM6368
+	bool "BMIPS BCM6368 family"
+	select SUPPORTS_BIG_ENDIAN
+	select SUPPORTS_CPU_MIPS32_R1
+	select MIPS_TUNE_4KC
+	select MIPS_L1_CACHE_SHIFT_4
+	select SWAP_IO_SPACE
+	select SYSRESET_SYSCON
+	help
+	  This supports BMIPS BCM6368 family including BCM6368 and BCM6369.
+
 config SOC_BMIPS_BCM63268
 	bool "BMIPS BCM63268 family"
 	select SUPPORTS_BIG_ENDIAN
@@ -84,6 +111,17 @@ endchoice
 choice
 	prompt "Board select"
 
+config BOARD_COMTREND_AR5315U
+	bool "Comtrend AR-5315u"
+	depends on SOC_BMIPS_BCM6318
+	select BMIPS_SUPPORTS_BOOT_RAM
+	help
+	  Comtrend AR-5315u boards have a BCM6318 SoC with 64 MB of RAM and 16
+	  MB of flash (SPI).
+	  Between its different peripherals there's an integrated switch with 4
+	  ethernet ports, 1 USB port, 1 UART, GPIO buttons and LEDs, and
+	  a BCM43217 (PCIe).
+
 config BOARD_COMTREND_AR5387UN
 	bool "Comtrend AR-5387un"
 	depends on SOC_BMIPS_BCM6328
@@ -117,6 +155,17 @@ config BOARD_COMTREND_VR3032U
 	  ethernet ports, 1 USB port, 1 UART, GPIO buttons and LEDs,
 	  and a BCM6362 (integrated).
 
+config BOARD_COMTREND_WAP5813N
+	bool "Comtrend WAP-5813n board"
+	depends on SOC_BMIPS_BCM6368
+	select BMIPS_SUPPORTS_BOOT_RAM
+	help
+	  Comtrend WAP-5813n boards have a BCM6369 SoC with 64 MB of RAM and
+	  8 MB of flash (CFI).
+	  Between its different peripherals there's a BCM53115 switch with 5
+	  ethernet ports, 1 USB port, 1 UART, GPIO buttons and LEDs,
+	  and a BCM4322 (miniPCI).
+
 config BOARD_HUAWEI_HG556A
 	bool "Huawei EchoLife HG556a"
 	depends on SOC_BMIPS_BCM6358
@@ -179,9 +228,11 @@ endchoice
 config BMIPS_SUPPORTS_BOOT_RAM
 	bool
 
+source "board/comtrend/ar5315u/Kconfig"
 source "board/comtrend/ar5387un/Kconfig"
 source "board/comtrend/ct5361/Kconfig"
 source "board/comtrend/vr3032u/Kconfig"
+source "board/comtrend/wap5813n/Kconfig"
 source "board/huawei/hg556a/Kconfig"
 source "board/netgear/cg3100d/Kconfig"
 source "board/sagem/f@st1704/Kconfig"