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authorrick <rick@andestech.com>2017-05-18 09:37:53 +0300
committerAndes <uboot@andestech.com>2017-05-22 09:05:46 +0300
commitb841b6e94662b3b21a56d6ecaab64dcdfb0d311c (patch)
tree92847f53ffaeb104754e2940b32b981314627750 /arch/nds32/cpu/n1213/ag101
parentf5076f869855045e527de7f1367c65f55a2b1448 (diff)
downloadu-boot-b841b6e94662b3b21a56d6ecaab64dcdfb0d311c.tar.xz
nds32: Support AE3XX platform.
Support Andestech AE3xx platform: serial, timer device tree flow. Signed-off-by: rick <rick@andestech.com>
Diffstat (limited to 'arch/nds32/cpu/n1213/ag101')
-rw-r--r--arch/nds32/cpu/n1213/ag101/Makefile3
-rw-r--r--arch/nds32/cpu/n1213/ag101/cpu.c8
-rw-r--r--arch/nds32/cpu/n1213/ag101/lowlevel_init.S59
3 files changed, 23 insertions, 47 deletions
diff --git a/arch/nds32/cpu/n1213/ag101/Makefile b/arch/nds32/cpu/n1213/ag101/Makefile
index c21ce02828..07fa9429a9 100644
--- a/arch/nds32/cpu/n1213/ag101/Makefile
+++ b/arch/nds32/cpu/n1213/ag101/Makefile
@@ -11,10 +11,7 @@
#
obj-y := cpu.o timer.o
-
-ifndef CONFIG_SKIP_LOWLEVEL_INIT
obj-y += lowlevel_init.o
-endif
ifndef CONFIG_SKIP_TRUNOFF_WATCHDOG
obj-y += watchdog.o
diff --git a/arch/nds32/cpu/n1213/ag101/cpu.c b/arch/nds32/cpu/n1213/ag101/cpu.c
index 31d72712f3..9da0b31b4b 100644
--- a/arch/nds32/cpu/n1213/ag101/cpu.c
+++ b/arch/nds32/cpu/n1213/ag101/cpu.c
@@ -31,16 +31,10 @@ int cleanup_before_linux(void)
{
disable_interrupts();
-#ifdef CONFIG_MMU
/* turn off I/D-cache */
+ cache_flush();
icache_disable();
dcache_disable();
-
- /* flush I/D-cache */
- invalidate_icac();
- invalidate_dcac();
-#endif
-
return 0;
}
diff --git a/arch/nds32/cpu/n1213/ag101/lowlevel_init.S b/arch/nds32/cpu/n1213/ag101/lowlevel_init.S
index abdd340479..452d814042 100644
--- a/arch/nds32/cpu/n1213/ag101/lowlevel_init.S
+++ b/arch/nds32/cpu/n1213/ag101/lowlevel_init.S
@@ -86,25 +86,7 @@
bnez $r1, 1b
.endm
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
-.globl lowlevel_init
-lowlevel_init:
- move $r10, $lp
-
- led 0x0
- jal mem_init
-
- led 0x10
- jal remap
-
-#if (defined(NDS32_EXT_FPU_DP) || defined(NDS32_EXT_FPU_SP))
- led 0x1f
- jal enable_fpu
-#endif
-
- led 0x20
- ret $r10
-
+.globl mem_init
mem_init:
move $r11, $lp
@@ -124,9 +106,7 @@ mem_init:
lwi $r1, [$r0+#0x00]
ori $r1, $r1, 0x8f0
xori $r1, $r1, 0x8f0
- /*
- * check board
- */
+ /* check board */
li $r3, CONFIG_FTPMU010_BASE + BOARD_ID_REG
lwi $r3, [$r3]
li $r4, BOARD_ID_FAMILY_MASK
@@ -134,29 +114,21 @@ mem_init:
li $r4, BOARD_ID_FAMILY_K7
xor $r4, $r3, $r4
beqz $r4, use_flash_16bit_boot
- /*
- * 32-bit mode
- */
+ /* 32-bit mode */
use_flash_32bit_boot:
ori $r1, $r1, 0x50
li $r2, 0x00151151
j sdram_b0_cr
- /*
- * 16-bit mode
- */
+ /* 16-bit mode */
use_flash_16bit_boot:
ori $r1, $r1, 0x60
li $r2, 0x00153153
- /*
- * SRAM bank0 config
- */
+ /* SRAM bank0 config */
sdram_b0_cr:
swi $r1, [$r0+#0x00]
swi $r2, [$r0+#0x04]
- /*
- * config AHB Controller
- */
+ /* config AHB Controller */
led 0x02
/*
@@ -192,6 +164,21 @@ sdram_b0_cr:
move $lp, $r11
ret
+
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+
+.globl lowlevel_init
+lowlevel_init:
+ move $r10, $lp
+ led 0x10
+ jal remap
+#if (defined(NDS32_EXT_FPU_DP) || defined(NDS32_EXT_FPU_SP))
+ led 0x1f
+ jal enable_fpu
+#endif
+ led 0x20
+ ret $r10
+
remap:
move $r11, $lp
#ifdef __NDS32_N1213_43U1H__ /* NDS32 V0 ISA - AG101 Only */
@@ -203,9 +190,7 @@ relo_base:
mfusr $r0, $pc
#endif /* __NDS32_N1213_43U1H__ */
- /*
- * Remapping
- */
+ /* Remapping */
led 0x1a
write32 SDMC_B0_BSR_A, SDMC_B0_BSR_D ! 0x00001800
write32 SDMC_B1_BSR_A, SDMC_B1_BSR_D ! 0x00001880