global: Remove dead code that starts with CONFIG_[0-9A]

This removes a number of spots of dead code based on symbols that start
with CONFIG_[0-9] or CONFIG_A.

Signed-off-by: Tom Rini <trini@konsulko.com>

2 files changed, 0 insertions, 148 deletions

diff --git a/arch/powerpc/cpu/mpc83xx/pcie.c b/arch/powerpc/cpu/mpc83xx/pcie.c
index 84797c871c..c386e4ed3f 100644
--- a/arch/powerpc/cpu/mpc83xx/pcie.c
+++ b/arch/powerpc/cpu/mpc83xx/pcie.c
@@ -34,148 +34,6 @@ static struct {
 #endif
 };
 
-#ifdef CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES
-
-/* private structure for mpc83xx pcie hose */
-static struct mpc83xx_pcie_priv {
-	u8 index;
-} pcie_priv[PCIE_MAX_BUSES] = {
-	{
-		/* pcie controller 1 */
-		.index = 0,
-	},
-	{
-		/* pcie controller 2 */
-		.index = 1,
-	},
-};
-
-static int mpc83xx_pcie_remap_cfg(struct pci_controller *hose, pci_dev_t dev)
-{
-	int bus = PCI_BUS(dev) - hose->first_busno;
-	immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
-	struct mpc83xx_pcie_priv *pcie_priv = hose->priv_data;
-	pex83xx_t *pex = &immr->pciexp[pcie_priv->index];
-	struct pex_outbound_window *out_win = &pex->bridge.pex_outbound_win[0];
-	u8 devfn = PCI_DEV(dev) << 3 | PCI_FUNC(dev);
-	u32 dev_base = bus << 24 | devfn << 16;
-
-	if (hose->indirect_type == INDIRECT_TYPE_NO_PCIE_LINK)
-		return -1;
-	/*
-	 * Workaround for the HW bug: for Type 0 configure transactions the
-	 * PCI-E controller does not check the device number bits and just
-	 * assumes that the device number bits are 0.
-	 */
-	if (devfn & 0xf8)
-		return -1;
-
-	out_le32(&out_win->tarl, dev_base);
-	return 0;
-}
-
-#define cfg_read(val, addr, type, op) \
-	do { *val = op((type)(addr)); } while (0)
-#define cfg_write(val, addr, type, op) \
-	do { op((type *)(addr), (val)); } while (0)
-
-#define cfg_read_err(val) do { *val = -1; } while (0)
-#define cfg_write_err(val) do { } while (0)
-
-#define PCIE_OP(rw, size, type, op)					\
-static int pcie_##rw##_config_##size(struct pci_controller *hose,	\
-				     pci_dev_t dev, int offset,		\
-				     type val)				\
-{									\
-	int ret;							\
-									\
-	ret = mpc83xx_pcie_remap_cfg(hose, dev);			\
-	if (ret) {							\
-		cfg_##rw##_err(val); 					\
-		return ret; 						\
-	}								\
-	cfg_##rw(val, (void *)hose->cfg_addr + offset, type, op);	\
-	return 0;							\
-}
-
-PCIE_OP(read, byte, u8 *, in_8)
-PCIE_OP(read, word, u16 *, in_le16)
-PCIE_OP(read, dword, u32 *, in_le32)
-PCIE_OP(write, byte, u8, out_8)
-PCIE_OP(write, word, u16, out_le16)
-PCIE_OP(write, dword, u32, out_le32)
-
-static void mpc83xx_pcie_register_hose(int bus, struct pci_region *reg,
-				       u8 link)
-{
-	extern void disable_addr_trans(void); /* start.S */
-	static struct pci_controller pcie_hose[PCIE_MAX_BUSES];
-	struct pci_controller *hose = &pcie_hose[bus];
-	int i;
-
-	/*
-	 * There are no spare BATs to remap all PCI-E windows for U-Boot, so
-	 * disable translations. In general, this is not great solution, and
-	 * that's why we don't register PCI-E hoses by default.
-	 */
-	disable_addr_trans();
-
-	for (i = 0; i < 2; i++, reg++) {
-		if (reg->size == 0)
-			break;
-
-		hose->regions[i] = *reg;
-		hose->region_count++;
-	}
-
-	i = hose->region_count++;
-	hose->regions[i].bus_start = 0;
-	hose->regions[i].phys_start = 0;
-	hose->regions[i].size = gd->ram_size;
-	hose->regions[i].flags = PCI_REGION_MEM | PCI_REGION_SYS_MEMORY;
-
-	i = hose->region_count++;
-	hose->regions[i].bus_start = CONFIG_SYS_IMMR;
-	hose->regions[i].phys_start = CONFIG_SYS_IMMR;
-	hose->regions[i].size = 0x100000;
-	hose->regions[i].flags = PCI_REGION_MEM | PCI_REGION_SYS_MEMORY;
-
-	hose->first_busno = pci_last_busno() + 1;
-	hose->last_busno = 0xff;
-
-	hose->cfg_addr = (unsigned int *)mpc83xx_pcie_cfg_space[bus].base;
-
-	hose->priv_data = &pcie_priv[bus];
-
-	pci_set_ops(hose,
-			pcie_read_config_byte,
-			pcie_read_config_word,
-			pcie_read_config_dword,
-			pcie_write_config_byte,
-			pcie_write_config_word,
-			pcie_write_config_dword);
-
-	if (!link)
-		hose->indirect_type = INDIRECT_TYPE_NO_PCIE_LINK;
-
-	pci_register_hose(hose);
-
-#ifdef CONFIG_PCI_SCAN_SHOW
-	printf("PCI:   Bus Dev VenId DevId Class Int\n");
-#endif
-	/*
-	 * Hose scan.
-	 */
-	hose->last_busno = pci_hose_scan(hose);
-}
-
-#else
-
-static void mpc83xx_pcie_register_hose(int bus, struct pci_region *reg,
-				       u8 link) {}
-
-#endif /* CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES */
-
 int get_pcie_clk(int index)
 {
 	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
@@ -340,8 +198,6 @@ static void mpc83xx_pcie_init_bus(int bus, struct pci_region *reg)
 		printf("link\n");
 	else
 		printf("No link\n");
-
-	mpc83xx_pcie_register_hose(bus, reg, reg16 >= PCI_LTSSM_L0);
 }
 
 /*
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index e03ab21f59..b6944d88eb 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -46,11 +46,7 @@
 #define MSR_RI		(1<<1)		/* Recoverable Exception */
 #define MSR_LE		(1<<0)		/* Little Endian */
 
-#ifdef CONFIG_APUS_FAST_EXCEPT
-#define MSR_		MSR_ME|MSR_IP|MSR_RI
-#else
 #define MSR_		MSR_ME|MSR_RI
-#endif
 #ifndef CONFIG_E500
 #define MSR_KERNEL	MSR_|MSR_IR|MSR_DR
 #else