diff options
author | Bin Meng <bmeng.cn@gmail.com> | 2021-06-04 08:51:13 +0300 |
---|---|---|
committer | Leo Yu-Chi Liang <ycliang@andestech.com> | 2021-06-17 04:39:08 +0300 |
commit | 77eae0ebe6858805416cdc091975156a19185427 (patch) | |
tree | 61d4c90ee4a87833766925873bea49ca336e5f33 /arch/riscv/dts/ae350-u-boot.dtsi | |
parent | 048aff6d2621df2654dce6f833a2cf843358486a (diff) | |
download | u-boot-77eae0ebe6858805416cdc091975156a19185427.tar.xz |
riscv: ae350: dts: Add missing "u-boot, dm-spl" for SPL config
At present the AE350 SPL defconfig is using OF_PRIOR_STAGE. The
intention was to use gdb to load device tree before running U-Boot
SPL/proper from RAM. When we switch to OF_SEPARATE we will have to
use our own DT but without "u-boot,dm-spl" in several essential
nodes, SPL does not boot.
Let's add all the required "u-boot,dm-spl" for SPL config.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Diffstat (limited to 'arch/riscv/dts/ae350-u-boot.dtsi')
-rw-r--r-- | arch/riscv/dts/ae350-u-boot.dtsi | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/arch/riscv/dts/ae350-u-boot.dtsi b/arch/riscv/dts/ae350-u-boot.dtsi new file mode 100644 index 0000000000..0d4201cfae --- /dev/null +++ b/arch/riscv/dts/ae350-u-boot.dtsi @@ -0,0 +1,52 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) + +/ { + cpus { + u-boot,dm-spl; + CPU0: cpu@0 { + u-boot,dm-spl; + CPU0_intc: interrupt-controller { + u-boot,dm-spl; + }; + }; + CPU1: cpu@1 { + u-boot,dm-spl; + CPU1_intc: interrupt-controller { + u-boot,dm-spl; + }; + }; + CPU2: cpu@2 { + u-boot,dm-spl; + CPU2_intc: interrupt-controller { + u-boot,dm-spl; + }; + }; + CPU3: cpu@3 { + u-boot,dm-spl; + CPU3_intc: interrupt-controller { + u-boot,dm-spl; + }; + }; + }; + + memory@0 { + u-boot,dm-spl; + }; + + soc { + u-boot,dm-spl; + + plic1: interrupt-controller@e6400000 { + u-boot,dm-spl; + }; + + plmt0@e6000000 { + u-boot,dm-spl; + }; + }; + + serial0: serial@f0300000 { + u-boot,dm-spl; + }; + +}; |