diff options
| author | Mason Huo <mason.huo@starfivetech.com> | 2023-02-01 06:16:51 +0300 |
|---|---|---|
| committer | Mason Huo <mason.huo@starfivetech.com> | 2023-02-22 12:54:41 +0300 |
| commit | e1c27bd246965545d43850cf749c5b3e969dd9a0 (patch) | |
| tree | b04fdf796a9437e5387f3c49c5d668febf2e5698 /arch/riscv/dts/starfive_evb.dts | |
| parent | 08ad189fb70c87a5fca39b72c3b49374d78dbdb1 (diff) | |
| download | u-boot-e1c27bd246965545d43850cf749c5b3e969dd9a0.tar.xz | |
riscv: dts: starfive: Enable PCIe host controller
Enable and add pinctrl configuration for PCIe host controller.
Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
Diffstat (limited to 'arch/riscv/dts/starfive_evb.dts')
| -rw-r--r-- | arch/riscv/dts/starfive_evb.dts | 98 |
1 files changed, 98 insertions, 0 deletions
diff --git a/arch/riscv/dts/starfive_evb.dts b/arch/riscv/dts/starfive_evb.dts index 47152ff829..dcccb48a39 100644 --- a/arch/riscv/dts/starfive_evb.dts +++ b/arch/riscv/dts/starfive_evb.dts @@ -163,6 +163,86 @@ }; }; + pcie0_perst_default: pcie0_perst_default { + perst-pins { + pinmux = <GPIOMUX(26, GPOUT_HIGH, GPOEN_ENABLE, GPI_NONE)>; + drive-strength = <2>; + input-disable; + input-schmitt-disable; + slew-rate = <0>; + }; + }; + + pcie0_perst_active: pcie0_perst_active { + perst-pins { + pinmux = <GPIOMUX(26, GPOUT_LOW, GPOEN_ENABLE, GPI_NONE)>; + drive-strength = <2>; + input-disable; + input-schmitt-disable; + slew-rate = <0>; + }; + }; + + pcie0_power_default: pcie0_power_default { + power-pins { + pinmux = <GPIOMUX(32, GPOUT_LOW, GPOEN_ENABLE, GPI_NONE)>; + drive-strength = <2>; + input-disable; + input-schmitt-disable; + slew-rate = <0>; + }; + }; + + pcie0_power_active: pcie0_power_active { + power-pins { + pinmux = <GPIOMUX(32, GPOUT_HIGH, GPOEN_ENABLE, GPI_NONE)>; + drive-strength = <2>; + input-disable; + input-schmitt-disable; + slew-rate = <0>; + }; + }; + + pcie1_perst_default: pcie1_perst_default { + perst-pins { + pinmux = <GPIOMUX(28, GPOUT_HIGH, GPOEN_ENABLE, GPI_NONE)>; + drive-strength = <2>; + input-disable; + input-schmitt-disable; + slew-rate = <0>; + }; + }; + + pcie1_perst_active: pcie1_perst_active { + perst-pins { + pinmux = <GPIOMUX(28, GPOUT_LOW, GPOEN_ENABLE, GPI_NONE)>; + drive-strength = <2>; + input-disable; + input-schmitt-disable; + slew-rate = <0>; + }; + }; + + pcie1_power_default: pcie1_power_default { + power-pins { + pinmux = <GPIOMUX(21, GPOUT_LOW, GPOEN_ENABLE, GPI_NONE)>; + drive-strength = <2>; + input-disable; + input-schmitt-disable; + slew-rate = <0>; + }; + }; + + pcie1_power_active: pcie1_power_active { + power-pins { + pinmux = <GPIOMUX(21, GPOUT_HIGH, GPOEN_ENABLE, GPI_NONE)>; + drive-strength = <2>; + input-disable; + input-schmitt-disable; + slew-rate = <0>; + }; + }; + }; &sdio0 { @@ -224,6 +304,24 @@ pinctrl-0 = <&usb_pins>; }; +&pcie0 { + pinctrl-names = "perst-default", "perst-active", "power-default", "power-active"; + pinctrl-0 = <&pcie0_perst_default>; + pinctrl-1 = <&pcie0_perst_active>; + pinctrl-2 = <&pcie0_power_default>; + pinctrl-3 = <&pcie0_power_active>; + status = "disabled"; +}; + +&pcie1 { + pinctrl-names = "perst-default", "perst-active", "power-default", "power-active"; + pinctrl-0 = <&pcie1_perst_default>; + pinctrl-1 = <&pcie1_perst_active>; + pinctrl-2 = <&pcie1_power_default>; + pinctrl-3 = <&pcie1_power_active>; + status = "okay"; +}; + &timer { status = "disabled"; }; |