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authorJessica Clarke <jrtc27@jrtc27.com>2022-08-12 20:50:03 +0300
committerLeo Yu-Chi Liang <ycliang@andestech.com>2022-09-05 15:36:44 +0300
commitb236a66ab576c3e55f5768074b3d5a9e1399dcb8 (patch)
treefc8efa67214742f2b7e22568ca8de85b604fd0e9 /arch/riscv/dts
parent427aa3c9b72b6672f714389a6f71b6cc2841d559 (diff)
downloadu-boot-b236a66ab576c3e55f5768074b3d5a9e1399dcb8.tar.xz
riscv: dts: Sync important Unmatched pmic and qspi0 changes from Linux
This adds the onkey, RTC and watchdog children to the DA9063 PMIC node, fixes the compatible for qspi0's flash node to match the official DT schema (it being an is25wp256 is discoverable, hence jedec,spi-nor is the only compatible that should be present) and exposes the card detect GPIO. Note that the device trees still diverge in some places (including important things like the PCIe controller's clock name) and should be cleaned up so that a common device tree is used in both projects rather than having different bindings. This patch does not attempt to do that, merely expose important functionality present in Linux's that is not in U-Boot's so that it can be used without the OS providing its own bundled copy. Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Diffstat (limited to 'arch/riscv/dts')
-rw-r--r--arch/riscv/dts/hifive-unmatched-a00.dts15
1 files changed, 14 insertions, 1 deletions
diff --git a/arch/riscv/dts/hifive-unmatched-a00.dts b/arch/riscv/dts/hifive-unmatched-a00.dts
index b44e8c160d..ea32ae72e8 100644
--- a/arch/riscv/dts/hifive-unmatched-a00.dts
+++ b/arch/riscv/dts/hifive-unmatched-a00.dts
@@ -76,6 +76,18 @@
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
+ onkey {
+ compatible = "dlg,da9063-onkey";
+ };
+
+ rtc {
+ compatible = "dlg,da9063-rtc";
+ };
+
+ wdt {
+ compatible = "dlg,da9063-watchdog";
+ };
+
regulators {
vdd_bcore1: bcore1 {
regulator-min-microvolt = <1050000>;
@@ -217,7 +229,7 @@
&qspi0 {
status = "okay";
flash@0 {
- compatible = "issi,is25wp256", "jedec,spi-nor";
+ compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
m25p,fast-read;
@@ -234,6 +246,7 @@
spi-max-frequency = <20000000>;
voltage-ranges = <3300 3300>;
disable-wp;
+ gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
};
};