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| author | yanhong.wang <yanhong.wang@starfivetech.com> | 2022-05-25 08:38:00 +0300 |
|---|---|---|
| committer | Yanhong Wang <yanhong.wang@linux.starfivetech.com> | 2022-10-18 11:24:36 +0300 |
| commit | 0b2572d9978f265b51a218f334434ab9fde41552 (patch) | |
| tree | c62db17e443dc3e674a63e06ab1f5f17271aee84 /arch/riscv/include/asm/arch-jh7110/jh7110-regs.h | |
| parent | b239f16521b95137a46d6bfb59d8214da3f0620b (diff) | |
| download | u-boot-0b2572d9978f265b51a218f334434ab9fde41552.tar.xz | |
clk:starfive-jh7110: Update pll0/pll1/pll2 clk
Remove pll0/pll1/pll2 clk define from jh7110_clk.dts to clk-jh7110.c
Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
Diffstat (limited to 'arch/riscv/include/asm/arch-jh7110/jh7110-regs.h')
0 files changed, 0 insertions, 0 deletions