diff options
author | Tom Rini <trini@konsulko.com> | 2021-01-06 00:20:26 +0300 |
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committer | Tom Rini <trini@konsulko.com> | 2021-01-06 00:20:26 +0300 |
commit | 720620e6916ba40b9a173bb07706d2c73f3c23e7 (patch) | |
tree | b085821f1d1137d80e9bb73f405ea0680db338b9 /arch/riscv | |
parent | c86b18074c9d40bfa63cda1068b6dfb810d4377d (diff) | |
parent | 62b07b5173e3d04fabfac42cf1f4779d021f94ad (diff) | |
download | u-boot-720620e6916ba40b9a173bb07706d2c73f3c23e7.tar.xz |
Merge tag 'v2021.01-rc5' into next
Prepare v2021.01-rc5
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/riscv')
-rw-r--r-- | arch/riscv/cpu/start.S | 2 | ||||
-rw-r--r-- | arch/riscv/dts/k210-maix-bit.dts | 46 | ||||
-rw-r--r-- | arch/riscv/dts/k210.dtsi | 15 | ||||
-rw-r--r-- | arch/riscv/lib/crt0_riscv_efi.S | 28 | ||||
-rw-r--r-- | arch/riscv/lib/interrupts.c | 8 |
5 files changed, 87 insertions, 12 deletions
diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index bbc737ed9a..8589509e01 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -123,7 +123,7 @@ call_board_init_f_0: * wait for initialization to complete. */ la t0, hart_lottery - li s2, 1 + li t1, 1 amoswap.w s2, t1, 0(t0) bnez s2, wait_for_gd_init #else diff --git a/arch/riscv/dts/k210-maix-bit.dts b/arch/riscv/dts/k210-maix-bit.dts index c2beec602c..e4dea205b2 100644 --- a/arch/riscv/dts/k210-maix-bit.dts +++ b/arch/riscv/dts/k210-maix-bit.dts @@ -152,7 +152,7 @@ pinmux = <K210_FPIOA(26, K210_PCF_SPI1_D1)>, <K210_FPIOA(27, K210_PCF_SPI1_SCLK)>, <K210_FPIOA(28, K210_PCF_SPI1_D0)>, - <K210_FPIOA(29, K210_PCF_GPIOHS13)>; + <K210_FPIOA(29, K210_PCF_GPIOHS13)>; /* cs */ }; }; @@ -160,3 +160,47 @@ pinctrl-0 = <&fpioa_dvp>; pinctrl-names = "default"; }; + +&spi0 { + pinctrl-0 = <&fpioa_spi0>; + pinctrl-names = "default"; + num-cs = <1>; + cs-gpios = <&gpio0 20 0>; + + panel@0 { + compatible = "sitronix,st7789v"; + reg = <0>; + reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; + dc-gpios = <&gpio0 22 0>; + spi-max-frequency = <15000000>; + status = "disabled"; + }; +}; + +&spi1 { + pinctrl-0 = <&fpioa_spi1>; + pinctrl-names = "default"; + num-cs = <1>; + cs-gpios = <&gpio0 13 0>; + status = "okay"; + + slot@0 { + compatible = "mmc-spi-slot"; + reg = <0>; + spi-max-frequency = <25000000>; + voltage-ranges = <3300 3300>; + broken-cd; + }; +}; + +&spi3 { + status = "okay"; + + spi-flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + m25p,fast-read; + broken-flash-reset; + }; +}; diff --git a/arch/riscv/dts/k210.dtsi b/arch/riscv/dts/k210.dtsi index 81ef8ca4f7..81b04018c6 100644 --- a/arch/riscv/dts/k210.dtsi +++ b/arch/riscv/dts/k210.dtsi @@ -284,7 +284,8 @@ }; spi2: spi@50240000 { - compatible = "kendryte,k120-spislave", + compatible = "canaan,kendryte-k210-spi", + "snps,dw-apb-ssi-4.01", "snps,dw-apb-ssi"; spi-slave; reg = <0x50240000 0x100>; @@ -495,6 +496,8 @@ interrupts = <24>; clocks = <&sysclk K210_CLK_DVP>; resets = <&sysrst K210_RST_DVP>; + kendryte,sysctl = <&sysctl>; + kendryte,misc-offset = <K210_SYSCTL_MISC>; status = "disabled"; }; @@ -557,7 +560,8 @@ spi0: spi@52000000 { #address-cells = <1>; #size-cells = <0>; - compatible = "kendryte,k210-spi", + compatible = "canaan,kendryte-k210-spi", + "snps,dw-apb-ssi-4.01", "snps,dw-apb-ssi"; reg = <0x52000000 0x100>; interrupts = <1>; @@ -573,7 +577,8 @@ spi1: spi@53000000 { #address-cells = <1>; #size-cells = <0>; - compatible = "kendryte,k210-spi", + compatible = "canaan,kendryte-k210-spi", + "snps,dw-apb-ssi-4.01", "snps,dw-apb-ssi"; reg = <0x53000000 0x100>; interrupts = <2>; @@ -589,8 +594,8 @@ spi3: spi@54000000 { #address-cells = <1>; #size-cells = <0>; - compatible = "kendryte,k210-spi", - "snps,dw-apb-ssi"; + compatible = "canaan,kendryte-k210-ssi", + "snps,dwc-ssi-1.01a"; reg = <0x54000000 0x200>; interrupts = <4>; clocks = <&sysclk K210_CLK_SPI3>; diff --git a/arch/riscv/lib/crt0_riscv_efi.S b/arch/riscv/lib/crt0_riscv_efi.S index 87fe1e56f9..e7c4d99c21 100644 --- a/arch/riscv/lib/crt0_riscv_efi.S +++ b/arch/riscv/lib/crt0_riscv_efi.S @@ -15,11 +15,13 @@ #define SAVE_LONG(reg, idx) sd reg, (idx*SIZE_LONG)(sp) #define LOAD_LONG(reg, idx) ld reg, (idx*SIZE_LONG)(sp) #define PE_MACHINE IMAGE_FILE_MACHINE_RISCV64 +#define PE_MAGIC IMAGE_NT_OPTIONAL_HDR64_MAGIC #else #define SIZE_LONG 4 #define SAVE_LONG(reg, idx) sw reg, (idx*SIZE_LONG)(sp) #define LOAD_LONG(reg, idx) lw reg, (idx*SIZE_LONG)(sp) #define PE_MACHINE IMAGE_FILE_MACHINE_RISCV32 +#define PE_MAGIC IMAGE_NT_OPTIONAL_HDR32_MAGIC #endif @@ -48,7 +50,7 @@ coff_header: IMAGE_FILE_LOCAL_SYMS_STRIPPED | \ IMAGE_FILE_DEBUG_STRIPPED) optional_header: - .short IMAGE_NT_OPTIONAL_HDR64_MAGIC /* PE32+ format */ + .short PE_MAGIC /* PE32(+) format */ .byte 0x02 /* MajorLinkerVersion */ .byte 0x14 /* MinorLinkerVersion */ .long _edata - _start /* SizeOfCode */ @@ -56,9 +58,16 @@ optional_header: .long 0 /* SizeOfUninitializedData */ .long _start - ImageBase /* AddressOfEntryPoint */ .long _start - ImageBase /* BaseOfCode */ +#if __riscv_xlen == 32 + .long 0 /* BaseOfData */ +#endif extra_header_fields: +#if __riscv_xlen == 32 + .long 0 /* ImageBase */ +#else .quad 0 /* ImageBase */ +#endif .long 0x20 /* SectionAlignment */ .long 0x8 /* FileAlignment */ .short 0 /* MajorOperatingSystemVersion */ @@ -78,10 +87,17 @@ extra_header_fields: .long 0 /* CheckSum */ .short IMAGE_SUBSYSTEM_EFI_APPLICATION /* Subsystem */ .short 0 /* DllCharacteristics */ +#if __riscv_xlen == 32 + .long 0 /* SizeOfStackReserve */ + .long 0 /* SizeOfStackCommit */ + .long 0 /* SizeOfHeapReserve */ + .long 0 /* SizeOfHeapCommit */ +#else .quad 0 /* SizeOfStackReserve */ .quad 0 /* SizeOfStackCommit */ .quad 0 /* SizeOfHeapReserve */ .quad 0 /* SizeOfHeapCommit */ +#endif .long 0 /* LoaderFlags */ .long 0x6 /* NumberOfRvaAndSizes */ @@ -91,6 +107,16 @@ extra_header_fields: .quad 0 /* ExceptionTable */ .quad 0 /* CertificationTable */ .quad 0 /* BaseRelocationTable */ + .quad 0 /* Debug */ + .quad 0 /* Architecture */ + .quad 0 /* Global Ptr */ + .quad 0 /* TLS Table */ + .quad 0 /* Load Config Table */ + .quad 0 /* Bound Import */ + .quad 0 /* IAT */ + .quad 0 /* Delay Import Descriptor */ + .quad 0 /* CLR Runtime Header */ + .quad 0 /* Reserved */ /* Section table */ section_table: diff --git a/arch/riscv/lib/interrupts.c b/arch/riscv/lib/interrupts.c index 35de98e8ce..fb3ce118c1 100644 --- a/arch/riscv/lib/interrupts.c +++ b/arch/riscv/lib/interrupts.c @@ -27,7 +27,7 @@ static void show_efi_loaded_images(uintptr_t epc) static void show_regs(struct pt_regs *regs) { #ifdef CONFIG_SHOW_REGS - printf("SP: " REG_FMT " GP: " REG_FMT " TP: " REG_FMT "\n", + printf("\nSP: " REG_FMT " GP: " REG_FMT " TP: " REG_FMT "\n", regs->sp, regs->gp, regs->tp); printf("T0: " REG_FMT " T1: " REG_FMT " T2: " REG_FMT "\n", regs->t0, regs->t1, regs->t2); @@ -45,7 +45,7 @@ static void show_regs(struct pt_regs *regs) regs->s7, regs->s8, regs->s9); printf("S10: " REG_FMT " S11: " REG_FMT " T3: " REG_FMT "\n", regs->s10, regs->s11, regs->t3); - printf("T4: " REG_FMT " T5: " REG_FMT " T6: " REG_FMT "\n\n", + printf("T4: " REG_FMT " T5: " REG_FMT " T6: " REG_FMT "\n", regs->t4, regs->t5, regs->t6); #endif } @@ -80,12 +80,12 @@ static void _exit_trap(ulong code, ulong epc, ulong tval, struct pt_regs *regs) epc, regs->ra, tval); /* Print relocation adjustments, but only if gd is initialized */ if (gd && gd->flags & GD_FLG_RELOC) - printf("EPC: " REG_FMT " RA: " REG_FMT " reloc adjusted\n\n", + printf("EPC: " REG_FMT " RA: " REG_FMT " reloc adjusted\n", epc - gd->reloc_off, regs->ra - gd->reloc_off); show_regs(regs); show_efi_loaded_images(epc); - hang(); + panic("\n"); } int interrupt_init(void) |