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authorPadmarao Begari <padmarao.begari@microchip.com>2021-01-15 05:50:35 +0300
committerAndes <uboot@andestech.com>2021-01-18 06:06:38 +0300
commit5af3574f6ad0c9af5e04e6ab0ee910a600e45cff (patch)
tree928690587b33e602c45010c7ae3b7965bf624bf3 /arch/riscv
parentbc8d12bfd8750de265b742f2ab9cdde2726ea85f (diff)
downloadu-boot-5af3574f6ad0c9af5e04e6ab0ee910a600e45cff.tar.xz
riscv: Add DMA 64-bit address support
dma_addr_t holds any valid DMA address. If the DMA API only uses 32/64-bit addresses, dma_addr_t need only be 32/64 bits wide. Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com>
Diffstat (limited to 'arch/riscv')
-rw-r--r--arch/riscv/Kconfig4
-rw-r--r--arch/riscv/include/asm/types.h4
2 files changed, 8 insertions, 0 deletions
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 30b05408b1..55eaee2da6 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -152,6 +152,10 @@ config 32BIT
config 64BIT
bool
+config DMA_ADDR_T_64BIT
+ bool
+ default y if 64BIT
+
config SIFIVE_CLINT
bool
depends on RISCV_MMODE || SPL_RISCV_MMODE
diff --git a/arch/riscv/include/asm/types.h b/arch/riscv/include/asm/types.h
index 403cf9a48f..b800b2d221 100644
--- a/arch/riscv/include/asm/types.h
+++ b/arch/riscv/include/asm/types.h
@@ -29,7 +29,11 @@ typedef unsigned short umode_t;
#include <stddef.h>
+#ifdef CONFIG_DMA_ADDR_T_64BIT
+typedef u64 dma_addr_t;
+#else
typedef u32 dma_addr_t;
+#endif
typedef unsigned long phys_addr_t;
typedef unsigned long phys_size_t;