diff options
author | Simon Glass <sjg@chromium.org> | 2014-11-15 04:18:35 +0300 |
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committer | Simon Glass <sjg@chromium.org> | 2014-11-25 16:34:01 +0300 |
commit | 72cd085aaed511abf1ece0b406b79b90d26826af (patch) | |
tree | 5c57df7d00ed6644eb55eb358f90caf055d062bd /arch/x86/cpu/ivybridge/bd82x6x.c | |
parent | 8c74a57318d1302d28a10ae862a7faa9086e2660 (diff) | |
download | u-boot-72cd085aaed511abf1ece0b406b79b90d26826af.tar.xz |
x86: ivybridge: Add additional LPC init
Set up all the remaining pieces of the LPC (low-pin-count) peripheral in
PCH (Peripheral Controller Hub).
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/cpu/ivybridge/bd82x6x.c')
-rw-r--r-- | arch/x86/cpu/ivybridge/bd82x6x.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/x86/cpu/ivybridge/bd82x6x.c b/arch/x86/cpu/ivybridge/bd82x6x.c index fab7c53485..be4db74338 100644 --- a/arch/x86/cpu/ivybridge/bd82x6x.c +++ b/arch/x86/cpu/ivybridge/bd82x6x.c @@ -88,6 +88,12 @@ void bd82x6x_pci_bus_enable_resources(pci_dev_t dev) int bd82x6x_init_pci_devices(void) { + struct pci_controller *hose; + + hose = pci_bus_to_hose(0); + lpc_enable(PCH_LPC_DEV); + lpc_init(hose, PCH_LPC_DEV); + return 0; } |