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authorSimon Glass <sjg@chromium.org>2016-03-12 08:06:57 +0300
committerBin Meng <bmeng.cn@gmail.com>2016-03-17 05:27:24 +0300
commit8c30b571303fffd06615aeeb3143112c7bb00f2a (patch)
tree7ffc848c9a8be9d17e408d0e63531d8b73b9d381 /arch/x86/cpu/ivybridge/bd82x6x.c
parentbb096b9fad65696798ffd1637b30d9cc7951e70c (diff)
downloadu-boot-8c30b571303fffd06615aeeb3143112c7bb00f2a.tar.xz
x86: Move common LPC code to its own place
Some of the LPC code is common to several Intel LPC devices. Move it into a common location. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/cpu/ivybridge/bd82x6x.c')
-rw-r--r--arch/x86/cpu/ivybridge/bd82x6x.c16
1 files changed, 2 insertions, 14 deletions
diff --git a/arch/x86/cpu/ivybridge/bd82x6x.c b/arch/x86/cpu/ivybridge/bd82x6x.c
index 55057e017c..4c039ac9c6 100644
--- a/arch/x86/cpu/ivybridge/bd82x6x.c
+++ b/arch/x86/cpu/ivybridge/bd82x6x.c
@@ -14,6 +14,7 @@
#include <asm/intel_regs.h>
#include <asm/io.h>
#include <asm/lapic.h>
+#include <asm/lpc_common.h>
#include <asm/pci.h>
#include <asm/arch/bd82x6x.h>
#include <asm/arch/model_206ax.h>
@@ -188,20 +189,7 @@ static int bd82x6x_pch_get_spi_base(struct udevice *dev, ulong *sbasep)
static int bd82x6x_set_spi_protect(struct udevice *dev, bool protect)
{
- uint8_t bios_cntl;
-
- /* Adjust the BIOS write protect and SMM BIOS Write Protect Disable */
- dm_pci_read_config8(dev, BIOS_CTRL, &bios_cntl);
- if (protect) {
- bios_cntl &= ~BIOS_CTRL_BIOSWE;
- bios_cntl |= BIT(5);
- } else {
- bios_cntl |= BIOS_CTRL_BIOSWE;
- bios_cntl &= ~BIT(5);
- }
- dm_pci_write_config8(dev, BIOS_CTRL, bios_cntl);
-
- return 0;
+ return lpc_set_spi_protect(dev, BIOS_CTRL, protect);
}
static int bd82x6x_get_gpio_base(struct udevice *dev, u32 *gbasep)