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| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2020-07-28 12:56:25 +0300 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2020-08-03 05:46:56 +0300 |
| commit | 549c6f47e67546e1fee87c0bae2ab84af9a9a693 (patch) | |
| tree | 5a750eced72ad473a099f19736cced6225e211f7 /arch/x86/cpu | |
| parent | a0186110af858cc20c9054ede4e9035bc41ffba3 (diff) | |
| download | u-boot-549c6f47e67546e1fee87c0bae2ab84af9a9a693.tar.xz | |
x86: sipi_vector: Append appropriate suffixes
Assembler is not happy:
arch/x86/cpu/sipi_vector.S: Assembler messages:
arch/x86/cpu/sipi_vector.S:134: Warning: no instruction mnemonic suffix given and no register operands; using default for `cmp'
arch/x86/cpu/sipi_vector.S:139: Warning: no instruction mnemonic suffix given and no register operands; using default for `bts'
arch/x86/cpu/sipi_vector.S:157: Warning: no instruction mnemonic suffix given and no register operands; using default for `cmp'
Fix this by adding appropriate suffixes to the assembler commands.
Fixes: 45b5a37836d5 ("x86: Add multi-processor init")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/cpu')
| -rw-r--r-- | arch/x86/cpu/sipi_vector.S | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/x86/cpu/sipi_vector.S b/arch/x86/cpu/sipi_vector.S index 40cc27f1e1..fa1e6cb19a 100644 --- a/arch/x86/cpu/sipi_vector.S +++ b/arch/x86/cpu/sipi_vector.S @@ -131,12 +131,12 @@ ap_start: jnz microcode_done /* Determine if parallel microcode loading is allowed */ - cmp $0xffffffff, microcode_lock + cmpl $0xffffffff, microcode_lock je load_microcode /* Protect microcode loading */ lock_microcode: - lock bts $0, microcode_lock + lock btsl $0, microcode_lock jc lock_microcode load_microcode: @@ -154,7 +154,7 @@ load_microcode: popa /* Unconditionally unlock microcode loading */ - cmp $0xffffffff, microcode_lock + cmpl $0xffffffff, microcode_lock je microcode_done xor %eax, %eax |