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| author | Tom Rini <trini@konsulko.com> | 2021-01-06 06:34:43 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-01-06 06:34:43 +0300 |
| commit | b11f634b1c1be6ab419758c6596c673445e5ac70 (patch) | |
| tree | 2329e1ff53c6c543e01d84b7901c53621ad8b7f9 /arch/x86/dts | |
| parent | 720620e6916ba40b9a173bb07706d2c73f3c23e7 (diff) | |
| parent | 970349a96dac3ad46c33851b1a773bfe3f1d4b33 (diff) | |
| download | u-boot-b11f634b1c1be6ab419758c6596c673445e5ac70.tar.xz | |
Merge tag 'dm-pull-5jan21' of git://git.denx.de/u-boot-dm into next
Driver model: make some udevice fields private
Driver model: Rename U_BOOT_DEVICE et al.
dtoc: Tidy up and add more tests
ns16550 code clean-up
x86 and sandbox minor fixes for of-platdata
dtoc prepration for adding build-time instantiation
Diffstat (limited to 'arch/x86/dts')
| -rw-r--r-- | arch/x86/dts/chromebook_coral.dts | 22 | ||||
| -rw-r--r-- | arch/x86/dts/rtc.dtsi | 2 |
2 files changed, 17 insertions, 7 deletions
diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts index d66e128ae6..a846022095 100644 --- a/arch/x86/dts/chromebook_coral.dts +++ b/arch/x86/dts/chromebook_coral.dts @@ -102,12 +102,13 @@ }; cpus { - u-boot,dm-pre-reloc; + u-boot,dm-pre-proper; #address-cells = <1>; #size-cells = <0>; cpu_0: cpu@0 { - u-boot,dm-pre-reloc; + u-boot,dm-pre-proper; + u-boot,dm-spl; device_type = "cpu"; compatible = "intel,apl-cpu"; reg = <0>; @@ -174,6 +175,9 @@ */ fsp_s: fsp-s { }; + fsp_m: fsp-m { + u-boot,dm-spl; + }; nhlt { intel,dmic-channels = <4>; @@ -181,12 +185,14 @@ }; punit@0,1 { - u-boot,dm-pre-reloc; + u-boot,dm-pre-proper; + u-boot,dm-spl; reg = <0x00000800 0 0 0 0>; compatible = "intel,apl-punit"; }; gma@2,0 { + u-boot,dm-pre-proper; reg = <0x00001000 0 0 0 0>; compatible = "fsp-fb"; }; @@ -321,7 +327,8 @@ }; spi: fast-spi@d,2 { - u-boot,dm-pre-reloc; + u-boot,dm-pre-proper; + u-boot,dm-spl; reg = <0x02006a10 0 0 0 0>; #address-cells = <1>; #size-cells = <0>; @@ -332,7 +339,8 @@ fwstore_spi: spi-flash@0 { #size-cells = <1>; #address-cells = <1>; - u-boot,dm-pre-reloc; + u-boot,dm-pre-proper; + u-boot,dm-spl; reg = <0>; compatible = "winbond,w25q128fw", "jedec,spi-nor"; @@ -574,7 +582,7 @@ #size-cells = <0>; u-boot,dm-pre-reloc; cros_ec: cros-ec { - u-boot,dm-pre-reloc; + u-boot,dm-pre-proper; compatible = "google,cros-ec-lpc"; reg = <0x204 1 0x200 1 0x880 0x80>; @@ -650,7 +658,9 @@ PAD_CFG_NF(LPC_CLKRUNB, UP_20K, DEEP, NF1) /* LPC_CLKRUN_N */ PAD_CFG_NF(LPC_FRAMEB, NATIVE, DEEP, NF1) /* LPC_FRAME_N */ >; +}; +&fsp_m { fspm,package = <PACKAGE_BGA>; fspm,profile = <PROFILE_LPDDR4_2400_24_22_22>; fspm,memory-down = <MEMORY_DOWN_YES>; diff --git a/arch/x86/dts/rtc.dtsi b/arch/x86/dts/rtc.dtsi index d0bbd84e50..942cc937dc 100644 --- a/arch/x86/dts/rtc.dtsi +++ b/arch/x86/dts/rtc.dtsi @@ -1,7 +1,7 @@ / { rtc: rtc { compatible = "motorola,mc146818"; - u-boot,dm-pre-reloc; + u-boot,dm-pre-proper; reg = <0x70 2>; }; }; |