diff options
| author | Simon Glass <sjg@chromium.org> | 2019-12-09 03:40:14 +0300 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2019-12-15 06:44:29 +0300 |
| commit | 6a4c237af93e698b03ab962437aa6f9de552f6a4 (patch) | |
| tree | 627b0064080e5779d8e23e27fba635fc84caacb8 /arch/x86/include | |
| parent | 409d4c6fe984eab55688792e5d9a64afb5d6f095 (diff) | |
| download | u-boot-6a4c237af93e698b03ab962437aa6f9de552f6a4.tar.xz | |
x86: apl: Add a CPU driver
Add a bare-bones CPU driver so that CPUs can be probed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/include')
| -rw-r--r-- | arch/x86/include/asm/arch-apollolake/cpu.h | 20 | ||||
| -rw-r--r-- | arch/x86/include/asm/msr-index.h | 1 |
2 files changed, 21 insertions, 0 deletions
diff --git a/arch/x86/include/asm/arch-apollolake/cpu.h b/arch/x86/include/asm/arch-apollolake/cpu.h new file mode 100644 index 0000000000..5e906c5e7d --- /dev/null +++ b/arch/x86/include/asm/arch-apollolake/cpu.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright 2019 Google LLC + */ + +#ifndef _ASM_ARCH_CPU_H +#define _ASM_ARCH_CPU_H + +/* Common Timer Copy (CTC) frequency - 19.2MHz */ +#define CTC_FREQ 19200000 + +#define MAX_PCIE_PORTS 6 +#define CLKREQ_DISABLED 0xf + +#ifndef __ASSEMBLY__ +/* Flush L1D to L2 */ +void cpu_flush_l1d_to_l2(void); +#endif + +#endif /* _ASM_ARCH_CPU_H */ diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 79a9369de1..246c14f815 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -70,6 +70,7 @@ #define MSR_IA32_BBL_CR_CTL 0x00000119 #define MSR_IA32_BBL_CR_CTL3 0x0000011e #define MSR_POWER_MISC 0x00000120 +#define FLUSH_DL1_L2 (1 << 8) #define ENABLE_ULFM_AUTOCM_MASK (1 << 2) #define ENABLE_INDP_AUTOCM_MASK (1 << 3) |