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authorBin Meng <bmeng.cn@gmail.com>2021-07-28 07:00:22 +0300
committerBin Meng <bmeng.cn@gmail.com>2021-08-02 10:11:40 +0300
commit5824bc6d6fe5f63aa1fb9acbe5ad5aa28d77380f (patch)
tree6487147d95901121d9caa2391759fc654cf0061a /arch/x86
parentffaa7abfc5e930448a3aadb17e5eb00cabb37b9d (diff)
downloadu-boot-5824bc6d6fe5f63aa1fb9acbe5ad5aa28d77380f.tar.xz
x86: tsc: Rename X86_TSC_TIMER_EARLY_FREQ to X86_TSC_TIMER_FREQ
Currently there are two places to specify the x86 TSC timer frequency with one in Kconfig used for early timer and the other one in device tree used when the frequency cannot be determined from hardware. This may potentially create an inconsistent config where the 2 values do not match. Let's use the one specified in Kconfig in the device tree as well. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/cpu/quark/Kconfig4
-rw-r--r--arch/x86/dts/galileo.dts2
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/x86/cpu/quark/Kconfig b/arch/x86/cpu/quark/Kconfig
index 430cce184d..61bb5792c8 100644
--- a/arch/x86/cpu/quark/Kconfig
+++ b/arch/x86/cpu/quark/Kconfig
@@ -130,8 +130,8 @@ config SYS_CAR_SIZE
Space in bytes in eSRAM used as Cache-As-ARM (CAR).
Note this size must not exceed eSRAM's total size.
-config X86_TSC_TIMER_EARLY_FREQ
+config X86_TSC_TIMER_FREQ
int
- default 400
+ default 400000000
endif
diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts
index 501047124e..b5ba1181dd 100644
--- a/arch/x86/dts/galileo.dts
+++ b/arch/x86/dts/galileo.dts
@@ -42,7 +42,7 @@
};
tsc-timer {
- clock-frequency = <400000000>;
+ clock-frequency = <CONFIG_X86_TSC_TIMER_FREQ>;
};
mrc {