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| author | Simon Glass <sjg@chromium.org> | 2021-03-15 08:00:34 +0300 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2021-03-27 05:04:31 +0300 |
| commit | 70f5c99d607d8687d4e537c388af82bb194f2ef9 (patch) | |
| tree | 7a33d911d02afd6f81b66cbac91ef18ed901b3cc /arch/x86 | |
| parent | 9087e468c7f8a8bc6fb6b4511ba35539752ca33b (diff) | |
| download | u-boot-70f5c99d607d8687d4e537c388af82bb194f2ef9.tar.xz | |
x86: coreboot: Don't setup MTRR when booting from coreboot
This currently hangs and it is not necessary in any case. Drop the code
when booting from coreboot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86')
| -rw-r--r-- | arch/x86/lib/init_helpers.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/x86/lib/init_helpers.c b/arch/x86/lib/init_helpers.c index 066dc404a2..67401b9ba7 100644 --- a/arch/x86/lib/init_helpers.c +++ b/arch/x86/lib/init_helpers.c @@ -18,6 +18,9 @@ int init_cache_f_r(void) IS_ENABLED(CONFIG_FSP_VERSION2); int ret; + if (!ll_boot_init()) + return 0; + do_mtrr &= !IS_ENABLED(CONFIG_FSP_VERSION1) && !IS_ENABLED(CONFIG_SYS_SLIMBOOTLOADER); @@ -31,9 +34,6 @@ int init_cache_f_r(void) return ret; } - if (!ll_boot_init()) - return 0; - /* Initialise the CPU cache(s) */ return init_cache(); } |