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| author | Tom Rini <trini@konsulko.com> | 2023-01-19 17:41:54 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2023-01-19 17:41:54 +0300 |
| commit | 7aec35be4b5fa7aabc0ece03dc8825495d86a1be (patch) | |
| tree | 483d9f85e8184cb91f00e3345391bff13eee580a /arch/x86 | |
| parent | 5b958dea5c678dbdb2aeb6ac3c0c8cc8dfea065c (diff) | |
| parent | ace75d642fa71034b248cde30709c79e06c52d61 (diff) | |
| download | u-boot-7aec35be4b5fa7aabc0ece03dc8825495d86a1be.tar.xz | |
Merge branch '2022-01-18-assorted-updates'
- A few TI platform fixes, compression test cleanup and zstd update,
npcm7xx update, add "part type" subcommand, VBE bugfix on some
platforms, cleanup EVENT related Kconfig option logic (and fix some
platforms), other minor cleanups.
Diffstat (limited to 'arch/x86')
| -rw-r--r-- | arch/x86/Kconfig | 1 | ||||
| -rw-r--r-- | arch/x86/cpu/baytrail/Kconfig | 1 | ||||
| -rw-r--r-- | arch/x86/cpu/broadwell/Kconfig | 1 | ||||
| -rw-r--r-- | arch/x86/cpu/ivybridge/Kconfig | 1 | ||||
| -rw-r--r-- | arch/x86/cpu/quark/Kconfig | 1 | ||||
| -rw-r--r-- | arch/x86/lib/spl.c | 2 |
6 files changed, 6 insertions, 1 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 93f1c77be3..07be5cd05e 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -395,6 +395,7 @@ config FSP_VERSION1 config FSP_VERSION2 bool "FSP version 2.x" + select DM_EVENT help This covers versions 2.0 and 2.1. See here for details: https://github.com/IntelFsp/fsp/wiki diff --git a/arch/x86/cpu/baytrail/Kconfig b/arch/x86/cpu/baytrail/Kconfig index d2c3473d6a..a8efea8a34 100644 --- a/arch/x86/cpu/baytrail/Kconfig +++ b/arch/x86/cpu/baytrail/Kconfig @@ -7,6 +7,7 @@ config INTEL_BAYTRAIL select HAVE_FSP select ARCH_MISC_INIT select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED + select DM_EVENT imply HAVE_INTEL_ME imply ENABLE_MRC_CACHE imply AHCI_PCI diff --git a/arch/x86/cpu/broadwell/Kconfig b/arch/x86/cpu/broadwell/Kconfig index 5b015c89d9..39deda3644 100644 --- a/arch/x86/cpu/broadwell/Kconfig +++ b/arch/x86/cpu/broadwell/Kconfig @@ -6,6 +6,7 @@ config INTEL_BROADWELL bool select CACHE_MRC_BIN + select DM_EVENT select ARCH_EARLY_INIT_R imply HAVE_INTEL_ME imply ENABLE_MRC_CACHE diff --git a/arch/x86/cpu/ivybridge/Kconfig b/arch/x86/cpu/ivybridge/Kconfig index be3ef5e5d8..704f145adf 100644 --- a/arch/x86/cpu/ivybridge/Kconfig +++ b/arch/x86/cpu/ivybridge/Kconfig @@ -8,6 +8,7 @@ config NORTHBRIDGE_INTEL_IVYBRIDGE bool select CACHE_MRC_BIN if HAVE_MRC + select DM_EVENT imply HAVE_INTEL_ME imply ENABLE_MRC_CACHE imply AHCI_PCI diff --git a/arch/x86/cpu/quark/Kconfig b/arch/x86/cpu/quark/Kconfig index 61bb5792c8..0d4008a31f 100644 --- a/arch/x86/cpu/quark/Kconfig +++ b/arch/x86/cpu/quark/Kconfig @@ -7,6 +7,7 @@ config INTEL_QUARK select HAVE_RMU select ARCH_EARLY_INIT_R select ARCH_MISC_INIT + select DM_EVENT imply ENABLE_MRC_CACHE imply ETH_DESIGNWARE imply ICH_SPI diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c index 34ef68f2bb..bdf57ef7b5 100644 --- a/arch/x86/lib/spl.c +++ b/arch/x86/lib/spl.c @@ -92,7 +92,7 @@ static int x86_spl_init(void) #ifndef CONFIG_TPL ret = fsp_setup_pinctrl(NULL, NULL); if (ret) { - debug("%s: arch_cpu_init_dm() failed\n", __func__); + debug("%s: fsp_setup_pinctrl() failed\n", __func__); return ret; } #endif |