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authorSimon Glass <sjg@chromium.org>2021-03-15 08:00:23 +0300
committerSimon Glass <sjg@chromium.org>2021-03-27 05:04:29 +0300
commite7bae8283fea94cf470542916a063182c9e5771a (patch)
treef6b0fe28d2ff03e1ec7472f23482dbb4ed320478 /arch/x86
parent1058ab37f7176370e835d53299c2ae44437925e3 (diff)
downloadu-boot-e7bae8283fea94cf470542916a063182c9e5771a.tar.xz
x86: Allow installing an e820 when booting from coreboot
Move this code into a generic location so that it can be used by other x86 boards which want to boot from coreboot. Also ensure that this is called if booting from coreboot. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/cpu/coreboot/sdram.c27
-rw-r--r--arch/x86/include/asm/e820.h16
-rw-r--r--arch/x86/lib/coreboot/Makefile1
-rw-r--r--arch/x86/lib/coreboot/cb_support.c41
-rw-r--r--arch/x86/lib/zimage.c13
5 files changed, 69 insertions, 29 deletions
diff --git a/arch/x86/cpu/coreboot/sdram.c b/arch/x86/cpu/coreboot/sdram.c
index 43604ee837..4a256bad44 100644
--- a/arch/x86/cpu/coreboot/sdram.c
+++ b/arch/x86/cpu/coreboot/sdram.c
@@ -16,32 +16,7 @@ DECLARE_GLOBAL_DATA_PTR;
unsigned int install_e820_map(unsigned int max_entries,
struct e820_entry *entries)
{
- unsigned int num_entries;
- int i;
-
- num_entries = min((unsigned int)lib_sysinfo.n_memranges, max_entries);
- if (num_entries < lib_sysinfo.n_memranges) {
- printf("Warning: Limiting e820 map to %d entries.\n",
- num_entries);
- }
- for (i = 0; i < num_entries; i++) {
- struct memrange *memrange = &lib_sysinfo.memrange[i];
-
- entries[i].addr = memrange->base;
- entries[i].size = memrange->size;
-
- /*
- * coreboot has some extensions (type 6 & 16) to the E820 types.
- * When we detect this, mark it as E820_RESERVED.
- */
- if (memrange->type == CB_MEM_VENDOR_RSVD ||
- memrange->type == CB_MEM_TABLE)
- entries[i].type = E820_RESERVED;
- else
- entries[i].type = memrange->type;
- }
-
- return num_entries;
+ return cb_install_e820_map(max_entries, entries);
}
/*
diff --git a/arch/x86/include/asm/e820.h b/arch/x86/include/asm/e820.h
index a66c0d2489..850a0a7a89 100644
--- a/arch/x86/include/asm/e820.h
+++ b/arch/x86/include/asm/e820.h
@@ -22,9 +22,23 @@ struct e820_entry {
#define ISA_START_ADDRESS 0xa0000
#define ISA_END_ADDRESS 0x100000
-/* Implementation defined function to install an e820 map */
+/* Implementation-defined function to install an e820 map */
unsigned int install_e820_map(unsigned int max_entries,
struct e820_entry *);
+
+/**
+ * cb_install_e820_map() - Install e820 map provided by coreboot sysinfo
+ *
+ * This should be used when booting from coreboot, since in that case the
+ * memory areas are provided by coreboot in its sysinfo.
+ *
+ * @max_entries: Maximum number of entries to write
+ * @entries: Place to put entires
+ * @return number of entries written
+ */
+unsigned int cb_install_e820_map(unsigned int max_entries,
+ struct e820_entry *entries);
+
#endif /* __ASSEMBLY__ */
#endif /* _ASM_X86_E820_H */
diff --git a/arch/x86/lib/coreboot/Makefile b/arch/x86/lib/coreboot/Makefile
index b5250d916b..cb0ae1d017 100644
--- a/arch/x86/lib/coreboot/Makefile
+++ b/arch/x86/lib/coreboot/Makefile
@@ -4,3 +4,4 @@
#
obj-y += cb_sysinfo.o
+obj-y += cb_support.o
diff --git a/arch/x86/lib/coreboot/cb_support.c b/arch/x86/lib/coreboot/cb_support.c
new file mode 100644
index 0000000000..ebb45cdfb5
--- /dev/null
+++ b/arch/x86/lib/coreboot/cb_support.c
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Support for booting from coreboot
+ *
+ * Copyright 2021 Google LLC
+ */
+
+#include <common.h>
+#include <asm/cb_sysinfo.h>
+#include <asm/e820.h>
+
+unsigned int cb_install_e820_map(unsigned int max_entries,
+ struct e820_entry *entries)
+{
+ unsigned int num_entries;
+ int i;
+
+ num_entries = min((unsigned int)lib_sysinfo.n_memranges, max_entries);
+ if (num_entries < lib_sysinfo.n_memranges) {
+ printf("Warning: Limiting e820 map to %d entries\n",
+ num_entries);
+ }
+ for (i = 0; i < num_entries; i++) {
+ struct memrange *memrange = &lib_sysinfo.memrange[i];
+
+ entries[i].addr = memrange->base;
+ entries[i].size = memrange->size;
+
+ /*
+ * coreboot has some extensions (type 6 & 16) to the E820 types.
+ * When we detect this, mark it as E820_RESERVED.
+ */
+ if (memrange->type == CB_MEM_VENDOR_RSVD ||
+ memrange->type == CB_MEM_TABLE)
+ entries[i].type = E820_RESERVED;
+ else
+ entries[i].type = memrange->type;
+ }
+
+ return num_entries;
+}
diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c
index 602788e016..90fc8a466d 100644
--- a/arch/x86/lib/zimage.c
+++ b/arch/x86/lib/zimage.c
@@ -18,6 +18,7 @@
#include <bootm.h>
#include <command.h>
#include <env.h>
+#include <init.h>
#include <irq_func.h>
#include <log.h>
#include <malloc.h>
@@ -28,6 +29,7 @@
#include <asm/byteorder.h>
#include <asm/bootm.h>
#include <asm/bootparam.h>
+#include <asm/global_data.h>
#ifdef CONFIG_SYS_COREBOOT
#include <asm/arch/timestamp.h>
#endif
@@ -35,6 +37,8 @@
#include <linux/ctype.h>
#include <linux/libfdt.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* Memory lay-out:
*
@@ -309,8 +313,13 @@ int setup_zimage(struct boot_params *setup_base, char *cmd_line, int auto_boot,
int bootproto = get_boot_protocol(hdr, false);
log_debug("Setup E820 entries\n");
- setup_base->e820_entries = install_e820_map(
- ARRAY_SIZE(setup_base->e820_map), setup_base->e820_map);
+ if (ll_boot_init()) {
+ setup_base->e820_entries = install_e820_map(
+ ARRAY_SIZE(setup_base->e820_map), setup_base->e820_map);
+ } else if (IS_ENABLED(CONFIG_COREBOOT_SYSINFO)) {
+ setup_base->e820_entries = cb_install_e820_map(
+ ARRAY_SIZE(setup_base->e820_map), setup_base->e820_map);
+ }
if (bootproto == 0x0100) {
setup_base->screen_info.cl_magic = COMMAND_LINE_MAGIC;