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authorSimon Glass <sjg@chromium.org>2023-02-06 01:35:48 +0300
committerTom Rini <trini@konsulko.com>2023-02-10 00:32:25 +0300
commitffff21fb27291227f6ae680b45b88147e2cb2a87 (patch)
tree73d6de8ffa913c9d58327dbcaca8b3ddf968c161 /arch/x86
parent81e8a51cee2b265e26272f0c67518c4844baa36c (diff)
downloadu-boot-ffff21fb27291227f6ae680b45b88147e2cb2a87.tar.xz
x86: Correct Chrromebook typo
Fix a typo in a comment. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/lib/fsp/fsp_dram.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c
index 2bd408d0c5..cc889a688d 100644
--- a/arch/x86/lib/fsp/fsp_dram.c
+++ b/arch/x86/lib/fsp/fsp_dram.c
@@ -60,7 +60,7 @@ int dram_init_banksize(void)
*
* However it seems FSP2's behavior is different. We need to add the
* DRAM range in MTRR otherwise the boot process goes very slowly,
- * which was observed on Chrromebook Coral with FSP2.
+ * which was observed on Chromebook Coral with FSP2.
*/
update_mtrr = CONFIG_IS_ENABLED(FSP_VERSION2);