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authorTom Rini <trini@konsulko.com>2021-09-27 18:09:23 +0300
committerTom Rini <trini@konsulko.com>2021-09-27 18:09:23 +0300
commit1d1f98c8eed7bb4792300e655c2cb70136928f74 (patch)
treed08df140d52bd1298fa0e81ce908e2e09a880e5d /arch/x86
parente908d20fcbd847e17345591fc171b59d9a156516 (diff)
parent933bf2644591281ed96f9d5771cbb35fe95bcb00 (diff)
downloadu-boot-1d1f98c8eed7bb4792300e655c2cb70136928f74.tar.xz
Merge tag 'dm-pull-next-27sep21' of https://source.denx.de/u-boot/custodians/u-boot-dm into next
Various of-platdata improvements, including CONFIG_OF_REAL
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/cpu/apollolake/hostbridge.c4
-rw-r--r--arch/x86/cpu/apollolake/lpc.c2
-rw-r--r--arch/x86/cpu/apollolake/pch.c2
-rw-r--r--arch/x86/cpu/apollolake/pmc.c4
-rw-r--r--arch/x86/cpu/apollolake/uart.c2
-rw-r--r--arch/x86/cpu/coreboot/coreboot.c5
-rw-r--r--arch/x86/cpu/intel_common/itss.c2
-rw-r--r--arch/x86/cpu/intel_common/p2sb.c24
-rw-r--r--arch/x86/lib/lpc-uclass.c2
-rw-r--r--arch/x86/lib/tpl.c2
10 files changed, 24 insertions, 25 deletions
diff --git a/arch/x86/cpu/apollolake/hostbridge.c b/arch/x86/cpu/apollolake/hostbridge.c
index 9decab7aa3..2405dec852 100644
--- a/arch/x86/cpu/apollolake/hostbridge.c
+++ b/arch/x86/cpu/apollolake/hostbridge.c
@@ -220,7 +220,7 @@ static int apl_hostbridge_of_to_plat(struct udevice *dev)
ret = uclass_first_device_err(UCLASS_PINCTRL, &pinctrl);
if (ret)
return log_msg_ret("no hostbridge PINCTRL", ret);
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
int root;
/* Get length of PCI Express Region */
@@ -375,7 +375,7 @@ struct acpi_ops apl_hostbridge_acpi_ops = {
#endif
};
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static const struct udevice_id apl_hostbridge_ids[] = {
{ .compatible = "intel,apl-hostbridge" },
{ }
diff --git a/arch/x86/cpu/apollolake/lpc.c b/arch/x86/cpu/apollolake/lpc.c
index e085890d63..4be6366f04 100644
--- a/arch/x86/cpu/apollolake/lpc.c
+++ b/arch/x86/cpu/apollolake/lpc.c
@@ -128,7 +128,7 @@ struct acpi_ops apl_lpc_acpi_ops = {
.inject_dsdt = southbridge_inject_dsdt,
};
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static const struct udevice_id apl_lpc_ids[] = {
{ .compatible = "intel,apl-lpc" },
{ }
diff --git a/arch/x86/cpu/apollolake/pch.c b/arch/x86/cpu/apollolake/pch.c
index 39d6ad5ed4..a0f9b031de 100644
--- a/arch/x86/cpu/apollolake/pch.c
+++ b/arch/x86/cpu/apollolake/pch.c
@@ -23,7 +23,7 @@ static const struct pch_ops apl_pch_ops = {
.set_spi_protect = apl_set_spi_protect,
};
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static const struct udevice_id apl_pch_ids[] = {
{ .compatible = "intel,apl-pch" },
{ }
diff --git a/arch/x86/cpu/apollolake/pmc.c b/arch/x86/cpu/apollolake/pmc.c
index 1d21187c96..163119e2e9 100644
--- a/arch/x86/cpu/apollolake/pmc.c
+++ b/arch/x86/cpu/apollolake/pmc.c
@@ -107,7 +107,7 @@ int apl_pmc_ofdata_to_uc_plat(struct udevice *dev)
struct acpi_pmc_upriv *upriv = dev_get_uclass_priv(dev);
struct apl_pmc_plat *plat = dev_get_plat(dev);
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
u32 base[6];
int size;
int ret;
@@ -206,7 +206,7 @@ static const struct acpi_pmc_ops apl_pmc_ops = {
.global_reset_set_enable = apl_global_reset_set_enable,
};
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static const struct udevice_id apl_pmc_ids[] = {
{ .compatible = "intel,apl-pmc" },
{ }
diff --git a/arch/x86/cpu/apollolake/uart.c b/arch/x86/cpu/apollolake/uart.c
index 876fa592b8..a936243600 100644
--- a/arch/x86/cpu/apollolake/uart.c
+++ b/arch/x86/cpu/apollolake/uart.c
@@ -123,7 +123,7 @@ static int apl_ns16550_of_to_plat(struct udevice *dev)
return 0;
}
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static const struct udevice_id apl_ns16550_serial_ids[] = {
{ .compatible = "intel,apl-ns16550" },
{ },
diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c
index 69cf8f417c..aaa5ae112e 100644
--- a/arch/x86/cpu/coreboot/coreboot.c
+++ b/arch/x86/cpu/coreboot/coreboot.c
@@ -16,8 +16,7 @@
#include <asm/mtrr.h>
#include <asm/cb_sysinfo.h>
#include <asm/arch/timestamp.h>
-
-DECLARE_GLOBAL_DATA_PTR;
+#include <dm/ofnode.h>
int arch_cpu_init(void)
{
@@ -65,7 +64,7 @@ static void board_final_init(void)
mtrr_close(&state, true);
}
- if (!fdtdec_get_config_bool(gd->fdt_blob, "u-boot,no-apm-finalize")) {
+ if (!ofnode_conf_read_bool("u-boot,no-apm-finalize")) {
/*
* Issue SMI to coreboot to lock down ME and registers
* when allowed via device tree
diff --git a/arch/x86/cpu/intel_common/itss.c b/arch/x86/cpu/intel_common/itss.c
index 1eff030983..ec73b3d893 100644
--- a/arch/x86/cpu/intel_common/itss.c
+++ b/arch/x86/cpu/intel_common/itss.c
@@ -213,7 +213,7 @@ static const struct irq_ops itss_ops = {
#endif
};
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static const struct udevice_id itss_ids[] = {
{ .compatible = "intel,itss", .data = X86_IRQT_ITSS },
{ }
diff --git a/arch/x86/cpu/intel_common/p2sb.c b/arch/x86/cpu/intel_common/p2sb.c
index d73ae438bb..5a7b30d94a 100644
--- a/arch/x86/cpu/intel_common/p2sb.c
+++ b/arch/x86/cpu/intel_common/p2sb.c
@@ -88,7 +88,7 @@ int p2sb_of_to_plat(struct udevice *dev)
struct p2sb_uc_priv *upriv = dev_get_uclass_priv(dev);
struct p2sb_plat *plat = dev_get_plat(dev);
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
int ret;
u32 base[2];
@@ -159,16 +159,16 @@ static int p2sb_remove(struct udevice *dev)
static int p2sb_child_post_bind(struct udevice *dev)
{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
- struct p2sb_child_plat *pplat = dev_get_parent_plat(dev);
- int ret;
- u32 pid;
-
- ret = dev_read_u32(dev, "intel,p2sb-port-id", &pid);
- if (ret)
- return ret;
- pplat->pid = pid;
-#endif
+ if (CONFIG_IS_ENABLED(OF_REAL)) {
+ struct p2sb_child_plat *pplat = dev_get_parent_plat(dev);
+ int ret;
+ u32 pid;
+
+ ret = dev_read_u32(dev, "intel,p2sb-port-id", &pid);
+ if (ret)
+ return ret;
+ pplat->pid = pid;
+ }
return 0;
}
@@ -177,7 +177,7 @@ static const struct p2sb_ops p2sb_ops = {
.set_hide = intel_p2sb_set_hide,
};
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static const struct udevice_id p2sb_ids[] = {
{ .compatible = "intel,p2sb" },
{ }
diff --git a/arch/x86/lib/lpc-uclass.c b/arch/x86/lib/lpc-uclass.c
index 1302a6e34a..67b931d3b2 100644
--- a/arch/x86/lib/lpc-uclass.c
+++ b/arch/x86/lib/lpc-uclass.c
@@ -10,7 +10,7 @@
UCLASS_DRIVER(lpc) = {
.id = UCLASS_LPC,
.name = "lpc",
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.post_bind = dm_scan_fdt_dev,
#endif
};
diff --git a/arch/x86/lib/tpl.c b/arch/x86/lib/tpl.c
index b3e5f9c913..5b57e53c2d 100644
--- a/arch/x86/lib/tpl.c
+++ b/arch/x86/lib/tpl.c
@@ -139,7 +139,7 @@ void spl_board_init(void)
* for devices, so the TPL BARs continue to be used. Once U-Boot starts it does
* the auto allocation (after relocation).
*/
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static const struct udevice_id tpl_fake_pci_ids[] = {
{ .compatible = "pci-x86" },
{ }