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| author | Ye Li <ye.li@nxp.com> | 2021-08-07 11:01:02 +0300 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2021-08-09 15:46:51 +0300 |
| commit | 16243a1735fcaf3647d209b44b7de5c367d6bbd3 (patch) | |
| tree | 8f471d60d104a4c5fc32816b01f9f154518f1759 /arch | |
| parent | 619412ab54d1b4c27f93663535dbb287b8368e12 (diff) | |
| download | u-boot-16243a1735fcaf3647d209b44b7de5c367d6bbd3.tar.xz | |
arm: imx8ulp: Allocate DCNANO and MIPI_DSI to AD domain
Configure DCNANO and MIPI_DSI to be controlled by AD for single boot
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-imx/imx8ulp/soc.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c index add4618440..e5985c4cf1 100644 --- a/arch/arm/mach-imx/imx8ulp/soc.c +++ b/arch/arm/mach-imx/imx8ulp/soc.c @@ -482,6 +482,8 @@ int arch_cpu_init(void) setbits_le32(0x2802B044, BIT(7)); /* GPU 2D/3D to APD */ setbits_le32(0x2802B04C, BIT(1) | BIT(2)); + /* DCNANO and MIPI_DSI to APD */ + setbits_le32(0x2802B04C, BIT(1) | BIT(2) | BIT(3) | BIT(4)); } /* release xrdc, then allow A35 to write SRAM2 */ |