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author | Michal Simek <michal.simek@xilinx.com> | 2020-03-12 11:03:13 +0300 |
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committer | Michal Simek <michal.simek@xilinx.com> | 2020-04-06 13:52:45 +0300 |
commit | 47cc45a91ccc86c718fef7e8a00188e1047cf3dd (patch) | |
tree | a6257bee70aa737b8a6b0fa95902bdf28c081441 /arch | |
parent | f1433d0dc929b277551cd6095252b67ebe75307c (diff) | |
download | u-boot-47cc45a91ccc86c718fef7e8a00188e1047cf3dd.tar.xz |
arm64: zynqmp Add support for zcu102 rev1.1
rev1.1 has different DDR sodimm module that's why it requires different DDR
configuration.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/dts/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/dts/zynqmp-zcu102-rev1.1.dts | 15 |
2 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 820ee9733a..ec8fd112f9 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -277,6 +277,7 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \ zynqmp-zcu102-revA.dtb \ zynqmp-zcu102-revB.dtb \ zynqmp-zcu102-rev1.0.dtb \ + zynqmp-zcu102-rev1.1.dtb \ zynqmp-zcu104-revA.dtb \ zynqmp-zcu104-revC.dtb \ zynqmp-zcu106-revA.dtb \ diff --git a/arch/arm/dts/zynqmp-zcu102-rev1.1.dts b/arch/arm/dts/zynqmp-zcu102-rev1.1.dts new file mode 100644 index 0000000000..b6798394fc --- /dev/null +++ b/arch/arm/dts/zynqmp-zcu102-rev1.1.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * dts file for Xilinx ZynqMP ZCU102 Rev1.1 + * + * (C) Copyright 2016 - 2020, Xilinx, Inc. + * + * Michal Simek <michal.simek@xilinx.com> + */ + +#include "zynqmp-zcu102-rev1.0.dts" + +/ { + model = "ZynqMP ZCU102 Rev1.1"; + compatible = "xlnx,zynqmp-zcu102-rev1.1", "xlnx,zynqmp-zcu102", "xlnx,zynqmp"; +}; |