diff options
| author | yanhong.wang <yanhong.wang@starfivetech.com> | 2022-05-19 09:02:54 +0300 |
|---|---|---|
| committer | Yanhong Wang <yanhong.wang@linux.starfivetech.com> | 2022-10-18 11:24:36 +0300 |
| commit | 9ca1a627b4363ea3a08853cf1bbb821291ea0710 (patch) | |
| tree | b0fb4854fdd31ef758bf78c4ef3e4e269b98415d /arch | |
| parent | 967e3296edfa01d8109213f5dd89b7bc9e6c1801 (diff) | |
| download | u-boot-9ca1a627b4363ea3a08853cf1bbb821291ea0710.tar.xz | |
board:starfive:evb: modify the GPIO configuration for sd module
Modify the GPIO configuration for sd&emmc module, switch the clk of sd&emmc
to high frequency
Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
Diffstat (limited to 'arch')
| -rwxr-xr-x | arch/riscv/include/asm/arch-jh7110/jh7110-regs.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/riscv/include/asm/arch-jh7110/jh7110-regs.h b/arch/riscv/include/asm/arch-jh7110/jh7110-regs.h index 7ebe23adef..8307b0ef0d 100755 --- a/arch/riscv/include/asm/arch-jh7110/jh7110-regs.h +++ b/arch/riscv/include/asm/arch-jh7110/jh7110-regs.h @@ -82,6 +82,11 @@ #define CLK_QSPI_REF_SW_SHIFT 24 #define CLK_QSPI_REF_SW_MASK 0x1000000U +#define CLK_SDIO_SOURCEMUX_OFFSET 0x14 +#define CLK_SDIO_SCLK_SW_SHIFT 24 +#define CLK_SDIO_SCLK_SW_MASK 0x1000000U + + #define PLL0_DACPD_SHIFT 0x18U #define PLL0_DACPD_MASK 0x1000000U #define PLL0_DSMPD_SHIFT 0x19U |