diff options
author | Tom Rini <trini@konsulko.com> | 2021-09-27 18:09:23 +0300 |
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committer | Tom Rini <trini@konsulko.com> | 2021-09-27 18:09:23 +0300 |
commit | 1d1f98c8eed7bb4792300e655c2cb70136928f74 (patch) | |
tree | d08df140d52bd1298fa0e81ce908e2e09a880e5d /arch | |
parent | e908d20fcbd847e17345591fc171b59d9a156516 (diff) | |
parent | 933bf2644591281ed96f9d5771cbb35fe95bcb00 (diff) | |
download | u-boot-1d1f98c8eed7bb4792300e655c2cb70136928f74.tar.xz |
Merge tag 'dm-pull-next-27sep21' of https://source.denx.de/u-boot/custodians/u-boot-dm into next
Various of-platdata improvements, including CONFIG_OF_REAL
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-rockchip/rk3188/rk3188.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/rk3399/syscon_rk3399.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/rk3568/syscon_rk3568.c | 2 | ||||
-rw-r--r-- | arch/sandbox/dts/sandbox.dtsi | 21 | ||||
-rw-r--r-- | arch/sandbox/dts/test.dts | 17 | ||||
-rw-r--r-- | arch/sandbox/include/asm/irq.h | 20 | ||||
-rw-r--r-- | arch/x86/cpu/apollolake/hostbridge.c | 4 | ||||
-rw-r--r-- | arch/x86/cpu/apollolake/lpc.c | 2 | ||||
-rw-r--r-- | arch/x86/cpu/apollolake/pch.c | 2 | ||||
-rw-r--r-- | arch/x86/cpu/apollolake/pmc.c | 4 | ||||
-rw-r--r-- | arch/x86/cpu/apollolake/uart.c | 2 | ||||
-rw-r--r-- | arch/x86/cpu/coreboot/coreboot.c | 5 | ||||
-rw-r--r-- | arch/x86/cpu/intel_common/itss.c | 2 | ||||
-rw-r--r-- | arch/x86/cpu/intel_common/p2sb.c | 24 | ||||
-rw-r--r-- | arch/x86/lib/lpc-uclass.c | 2 | ||||
-rw-r--r-- | arch/x86/lib/tpl.c | 2 |
16 files changed, 82 insertions, 33 deletions
diff --git a/arch/arm/mach-rockchip/rk3188/rk3188.c b/arch/arm/mach-rockchip/rk3188/rk3188.c index ad8c6cd1d7..5a02914e1b 100644 --- a/arch/arm/mach-rockchip/rk3188/rk3188.c +++ b/arch/arm/mach-rockchip/rk3188/rk3188.c @@ -15,6 +15,7 @@ #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/grf_rk3188.h> #include <asm/arch-rockchip/hardware.h> +#include <dm/ofnode.h> #include <linux/err.h> #define GRF_BASE 0x20008000 @@ -107,7 +108,6 @@ int rk_board_late_init(void) } #ifdef CONFIG_SPL_BUILD -DECLARE_GLOBAL_DATA_PTR; static int setup_led(void) { #ifdef CONFIG_SPL_LED @@ -115,7 +115,7 @@ static int setup_led(void) char *led_name; int ret; - led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led"); + led_name = ofnode_conf_read_str("u-boot,boot-led"); if (!led_name) return 0; ret = led_get_by_label(led_name, &dev); diff --git a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c index b360ca7dde..2b5746cb31 100644 --- a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c @@ -21,7 +21,7 @@ static const struct udevice_id rk3399_syscon_ids[] = { U_BOOT_DRIVER(syscon_rk3399) = { .name = "rk3399_syscon", .id = UCLASS_SYSCON, -#if !CONFIG_IS_ENABLED(OF_PLATDATA) +#if CONFIG_IS_ENABLED(OF_REAL) .bind = dm_scan_fdt_dev, #endif .of_match = rk3399_syscon_ids, diff --git a/arch/arm/mach-rockchip/rk3568/syscon_rk3568.c b/arch/arm/mach-rockchip/rk3568/syscon_rk3568.c index 20adfd1169..5407e7827f 100644 --- a/arch/arm/mach-rockchip/rk3568/syscon_rk3568.c +++ b/arch/arm/mach-rockchip/rk3568/syscon_rk3568.c @@ -18,7 +18,7 @@ U_BOOT_DRIVER(syscon_rk3568) = { .name = "rk3568_syscon", .id = UCLASS_SYSCON, .of_match = rk3568_syscon_ids, -#if !CONFIG_IS_ENABLED(OF_PLATDATA) +#if CONFIG_IS_ENABLED(OF_REAL) .bind = dm_scan_fdt_dev, #endif }; diff --git a/arch/sandbox/dts/sandbox.dtsi b/arch/sandbox/dts/sandbox.dtsi index 6cf5f14cd1..66b813faad 100644 --- a/arch/sandbox/dts/sandbox.dtsi +++ b/arch/sandbox/dts/sandbox.dtsi @@ -66,7 +66,7 @@ }; gpio_b: gpios@1 { - u-boot,dm-pre-proper; + u-boot,dm-spl; gpio-controller; compatible = "sandbox,gpio"; #gpio-cells = <2>; @@ -74,6 +74,12 @@ sandbox,gpio-count = <10>; }; + gpio-test { + u-boot,dm-spl; + compatible = "sandbox,gpio-test"; + test-gpios = <&gpio_b 3 0>; + }; + hexagon { compatible = "demo-simple"; colour = "white"; @@ -124,6 +130,19 @@ #sound-dai-cells = <1>; }; + irq_sandbox: irq-sbox { + u-boot,dm-spl; + compatible = "sandbox,irq"; + interrupt-controller; + #interrupt-cells = <2>; + }; + + irq-test { + u-boot,dm-spl; + compatible = "sandbox,irq-test"; + interrupts-extended = <&irq_sandbox 3 0>; + }; + lcd { u-boot,dm-pre-proper; compatible = "sandbox,lcd-sdl"; diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index b36447c4a7..e27d106466 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -62,6 +62,9 @@ }; config { + testing-bool; + testing-int = <123>; + testing-str = "testing"; environment { from_fdt = "yes"; fdt_env_path = ""; @@ -821,19 +824,27 @@ }; cpus { + #address-cells = <1>; + #size-cells = <0>; timebase-frequency = <2000000>; - cpu-test1 { + cpu1: cpu@1 { + device_type = "cpu"; + reg = <0x1>; timebase-frequency = <3000000>; compatible = "sandbox,cpu_sandbox"; u-boot,dm-pre-reloc; }; - cpu-test2 { + cpu2: cpu@2 { + device_type = "cpu"; + reg = <0x2>; compatible = "sandbox,cpu_sandbox"; u-boot,dm-pre-reloc; }; - cpu-test3 { + cpu3: cpu@3 { + device_type = "cpu"; + reg = <0x3>; compatible = "sandbox,cpu_sandbox"; u-boot,dm-pre-reloc; }; diff --git a/arch/sandbox/include/asm/irq.h b/arch/sandbox/include/asm/irq.h new file mode 100644 index 0000000000..f73fec74f5 --- /dev/null +++ b/arch/sandbox/include/asm/irq.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright 2021 Google LLC + */ + +#ifndef __SANDBOX_IRQ_H +#define __SANDBOX_IRQ_H + +/** + * struct sandbox_irq_priv - private data for this driver + * + * @count: Counts the number calls to the read_and_clear() method + * @pending: true if an interrupt is pending, else false + */ +struct sandbox_irq_priv { + int count; + bool pending; +}; + +#endif /* __SANDBOX_IRQ_H */ diff --git a/arch/x86/cpu/apollolake/hostbridge.c b/arch/x86/cpu/apollolake/hostbridge.c index 9decab7aa3..2405dec852 100644 --- a/arch/x86/cpu/apollolake/hostbridge.c +++ b/arch/x86/cpu/apollolake/hostbridge.c @@ -220,7 +220,7 @@ static int apl_hostbridge_of_to_plat(struct udevice *dev) ret = uclass_first_device_err(UCLASS_PINCTRL, &pinctrl); if (ret) return log_msg_ret("no hostbridge PINCTRL", ret); -#if !CONFIG_IS_ENABLED(OF_PLATDATA) +#if CONFIG_IS_ENABLED(OF_REAL) int root; /* Get length of PCI Express Region */ @@ -375,7 +375,7 @@ struct acpi_ops apl_hostbridge_acpi_ops = { #endif }; -#if !CONFIG_IS_ENABLED(OF_PLATDATA) +#if CONFIG_IS_ENABLED(OF_REAL) static const struct udevice_id apl_hostbridge_ids[] = { { .compatible = "intel,apl-hostbridge" }, { } diff --git a/arch/x86/cpu/apollolake/lpc.c b/arch/x86/cpu/apollolake/lpc.c index e085890d63..4be6366f04 100644 --- a/arch/x86/cpu/apollolake/lpc.c +++ b/arch/x86/cpu/apollolake/lpc.c @@ -128,7 +128,7 @@ struct acpi_ops apl_lpc_acpi_ops = { .inject_dsdt = southbridge_inject_dsdt, }; -#if !CONFIG_IS_ENABLED(OF_PLATDATA) +#if CONFIG_IS_ENABLED(OF_REAL) static const struct udevice_id apl_lpc_ids[] = { { .compatible = "intel,apl-lpc" }, { } diff --git a/arch/x86/cpu/apollolake/pch.c b/arch/x86/cpu/apollolake/pch.c index 39d6ad5ed4..a0f9b031de 100644 --- a/arch/x86/cpu/apollolake/pch.c +++ b/arch/x86/cpu/apollolake/pch.c @@ -23,7 +23,7 @@ static const struct pch_ops apl_pch_ops = { .set_spi_protect = apl_set_spi_protect, }; -#if !CONFIG_IS_ENABLED(OF_PLATDATA) +#if CONFIG_IS_ENABLED(OF_REAL) static const struct udevice_id apl_pch_ids[] = { { .compatible = "intel,apl-pch" }, { } diff --git a/arch/x86/cpu/apollolake/pmc.c b/arch/x86/cpu/apollolake/pmc.c index 1d21187c96..163119e2e9 100644 --- a/arch/x86/cpu/apollolake/pmc.c +++ b/arch/x86/cpu/apollolake/pmc.c @@ -107,7 +107,7 @@ int apl_pmc_ofdata_to_uc_plat(struct udevice *dev) struct acpi_pmc_upriv *upriv = dev_get_uclass_priv(dev); struct apl_pmc_plat *plat = dev_get_plat(dev); -#if !CONFIG_IS_ENABLED(OF_PLATDATA) +#if CONFIG_IS_ENABLED(OF_REAL) u32 base[6]; int size; int ret; @@ -206,7 +206,7 @@ static const struct acpi_pmc_ops apl_pmc_ops = { .global_reset_set_enable = apl_global_reset_set_enable, }; -#if !CONFIG_IS_ENABLED(OF_PLATDATA) +#if CONFIG_IS_ENABLED(OF_REAL) static const struct udevice_id apl_pmc_ids[] = { { .compatible = "intel,apl-pmc" }, { } diff --git a/arch/x86/cpu/apollolake/uart.c b/arch/x86/cpu/apollolake/uart.c index 876fa592b8..a936243600 100644 --- a/arch/x86/cpu/apollolake/uart.c +++ b/arch/x86/cpu/apollolake/uart.c @@ -123,7 +123,7 @@ static int apl_ns16550_of_to_plat(struct udevice *dev) return 0; } -#if !CONFIG_IS_ENABLED(OF_PLATDATA) +#if CONFIG_IS_ENABLED(OF_REAL) static const struct udevice_id apl_ns16550_serial_ids[] = { { .compatible = "intel,apl-ns16550" }, { }, diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c index 69cf8f417c..aaa5ae112e 100644 --- a/arch/x86/cpu/coreboot/coreboot.c +++ b/arch/x86/cpu/coreboot/coreboot.c @@ -16,8 +16,7 @@ #include <asm/mtrr.h> #include <asm/cb_sysinfo.h> #include <asm/arch/timestamp.h> - -DECLARE_GLOBAL_DATA_PTR; +#include <dm/ofnode.h> int arch_cpu_init(void) { @@ -65,7 +64,7 @@ static void board_final_init(void) mtrr_close(&state, true); } - if (!fdtdec_get_config_bool(gd->fdt_blob, "u-boot,no-apm-finalize")) { + if (!ofnode_conf_read_bool("u-boot,no-apm-finalize")) { /* * Issue SMI to coreboot to lock down ME and registers * when allowed via device tree diff --git a/arch/x86/cpu/intel_common/itss.c b/arch/x86/cpu/intel_common/itss.c index 1eff030983..ec73b3d893 100644 --- a/arch/x86/cpu/intel_common/itss.c +++ b/arch/x86/cpu/intel_common/itss.c @@ -213,7 +213,7 @@ static const struct irq_ops itss_ops = { #endif }; -#if !CONFIG_IS_ENABLED(OF_PLATDATA) +#if CONFIG_IS_ENABLED(OF_REAL) static const struct udevice_id itss_ids[] = { { .compatible = "intel,itss", .data = X86_IRQT_ITSS }, { } diff --git a/arch/x86/cpu/intel_common/p2sb.c b/arch/x86/cpu/intel_common/p2sb.c index d73ae438bb..5a7b30d94a 100644 --- a/arch/x86/cpu/intel_common/p2sb.c +++ b/arch/x86/cpu/intel_common/p2sb.c @@ -88,7 +88,7 @@ int p2sb_of_to_plat(struct udevice *dev) struct p2sb_uc_priv *upriv = dev_get_uclass_priv(dev); struct p2sb_plat *plat = dev_get_plat(dev); -#if !CONFIG_IS_ENABLED(OF_PLATDATA) +#if CONFIG_IS_ENABLED(OF_REAL) int ret; u32 base[2]; @@ -159,16 +159,16 @@ static int p2sb_remove(struct udevice *dev) static int p2sb_child_post_bind(struct udevice *dev) { -#if !CONFIG_IS_ENABLED(OF_PLATDATA) - struct p2sb_child_plat *pplat = dev_get_parent_plat(dev); - int ret; - u32 pid; - - ret = dev_read_u32(dev, "intel,p2sb-port-id", &pid); - if (ret) - return ret; - pplat->pid = pid; -#endif + if (CONFIG_IS_ENABLED(OF_REAL)) { + struct p2sb_child_plat *pplat = dev_get_parent_plat(dev); + int ret; + u32 pid; + + ret = dev_read_u32(dev, "intel,p2sb-port-id", &pid); + if (ret) + return ret; + pplat->pid = pid; + } return 0; } @@ -177,7 +177,7 @@ static const struct p2sb_ops p2sb_ops = { .set_hide = intel_p2sb_set_hide, }; -#if !CONFIG_IS_ENABLED(OF_PLATDATA) +#if CONFIG_IS_ENABLED(OF_REAL) static const struct udevice_id p2sb_ids[] = { { .compatible = "intel,p2sb" }, { } diff --git a/arch/x86/lib/lpc-uclass.c b/arch/x86/lib/lpc-uclass.c index 1302a6e34a..67b931d3b2 100644 --- a/arch/x86/lib/lpc-uclass.c +++ b/arch/x86/lib/lpc-uclass.c @@ -10,7 +10,7 @@ UCLASS_DRIVER(lpc) = { .id = UCLASS_LPC, .name = "lpc", -#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) +#if CONFIG_IS_ENABLED(OF_REAL) .post_bind = dm_scan_fdt_dev, #endif }; diff --git a/arch/x86/lib/tpl.c b/arch/x86/lib/tpl.c index b3e5f9c913..5b57e53c2d 100644 --- a/arch/x86/lib/tpl.c +++ b/arch/x86/lib/tpl.c @@ -139,7 +139,7 @@ void spl_board_init(void) * for devices, so the TPL BARs continue to be used. Once U-Boot starts it does * the auto allocation (after relocation). */ -#if !CONFIG_IS_ENABLED(OF_PLATDATA) +#if CONFIG_IS_ENABLED(OF_REAL) static const struct udevice_id tpl_fake_pci_ids[] = { { .compatible = "pci-x86" }, { } |