diff options
| author | Ashok Reddy Soma <ashok.reddy.soma@amd.com> | 2022-11-16 17:11:55 +0300 |
|---|---|---|
| committer | Michal Simek <michal.simek@amd.com> | 2022-11-22 17:02:07 +0300 |
| commit | 3655dd22a4c219d0ee69dc4a29e5553c1a1bb5d7 (patch) | |
| tree | ec9a677b048da541626f7e9055565a9cf2c080d4 /arch | |
| parent | ce8adf1a415b3027cc74c4e41e32cffad3e5ea40 (diff) | |
| download | u-boot-3655dd22a4c219d0ee69dc4a29e5553c1a1bb5d7.tar.xz | |
arm64: versal: Add octal spi flash mini u-boot configuration
Add configuration file for mini u-boot configuration which runs on a
smaller footprint from on chip memory(OCM). This configuration has
required CONFIG's enabled to support octal spi flash and uses DCC terminal
for console output. Add required dts for octal spi flash mini u-boot
configuration.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20221116141155.14788-4-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/dts/versal-mini-ospi-single.dts | 16 | ||||
| -rw-r--r-- | arch/arm/dts/versal-mini-ospi.dtsi | 77 |
3 files changed, 94 insertions, 0 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 7d3cac0eb7..43951a7731 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -383,6 +383,7 @@ dtb-$(CONFIG_ARCH_VERSAL) += \ versal-mini.dtb \ versal-mini-emmc0.dtb \ versal-mini-emmc1.dtb \ + versal-mini-ospi-single.dtb \ versal-mini-qspi-single.dtb \ xilinx-versal-virt.dtb dtb-$(CONFIG_ARCH_VERSAL_NET) += \ diff --git a/arch/arm/dts/versal-mini-ospi-single.dts b/arch/arm/dts/versal-mini-ospi-single.dts new file mode 100644 index 0000000000..23f6e47a18 --- /dev/null +++ b/arch/arm/dts/versal-mini-ospi-single.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx Versal QSPI single DTS + * + * Copyright (C) 2018-2020 Xilinx, Inc. + */ + +#include "versal-mini-ospi.dtsi" + +/ { + model = "Xilinx Versal MINI OSPI SINGLE"; +}; + +&flash0 { + spi-rx-bus-width = <8>; +}; diff --git a/arch/arm/dts/versal-mini-ospi.dtsi b/arch/arm/dts/versal-mini-ospi.dtsi new file mode 100644 index 0000000000..a4b76e2b99 --- /dev/null +++ b/arch/arm/dts/versal-mini-ospi.dtsi @@ -0,0 +1,77 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal Mini OSPI Configuration + * + * (C) Copyright 2018-2019, Xilinx, Inc. + * + * Siva Durga Prasad <siva.durga.paladugu@xilinx.com> + * Michal Simek <michal.simek@xilinx.com> + */ + +/dts-v1/; + +/ { + compatible = "xlnx,versal"; + #address-cells = <2>; + #size-cells = <2>; + model = "Xilinx Versal MINI OSPI"; + + clk125: clk125 { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <125000000>; + }; + + dcc: dcc { + compatible = "arm,dcc"; + status = "okay"; + u-boot,dm-pre-reloc; + }; + + amba: amba { + u-boot,dm-pre-reloc; + compatible = "simple-bus"; + #address-cells = <0x2>; + #size-cells = <0x2>; + ranges; + + ospi: spi@f1010000 { + compatible = "cadence,qspi", "cdns,qspi-nor"; + status = "okay"; + reg = <0 0xf1010000 0 0x10000 0 0xc0000000 0 0x20000000>; + clock-names = "ref_clk", "pclk"; + clocks = <&clk125 &clk125>; + bus-num = <2>; + num-cs = <1>; + cdns,fifo-depth = <256>; + cdns,fifo-width = <4>; + cdns,is-dma = <1>; + cdns,trigger-address = <0xc0000000>; + #address-cells = <1>; + #size-cells = <0>; + + flash0: flash@0 { + compatible = "n25q512a", "micron,m25p80", + "jedec,spi-nor"; + reg = <0x0>; + spi-tx-bus-width = <8>; + spi-rx-bus-width = <8>; + spi-max-frequency = <20000000>; + }; + }; + }; + + aliases { + serial0 = &dcc; + spi0 = &ospi; + }; + + chosen { + stdout-path = "serial0:115200"; + }; + + memory@fffc0000 { + device_type = "memory"; + reg = <0x0 0xfffc0000 0x0 0x40000>; + }; +}; |