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authorJonas Karlman <jonas@kwiboo.se>2023-01-21 22:01:39 +0300
committerSimon Glass <sjg@chromium.org>2023-01-26 20:47:45 +0300
commit5ad03fc77dfa055629bfbf283bdf938e6dd27d94 (patch)
tree91f122aa0d8a5f2bc9277e19089d10b72f754b31 /arch
parent9b2fd2d22852ee70c07934a78314b01ad9b96b62 (diff)
downloadu-boot-5ad03fc77dfa055629bfbf283bdf938e6dd27d94.tar.xz
rockchip: Align FIT image data to SD/MMC block length
SPL load FIT images by reading the data aligned to block length. Block length aligned image data is read directly to the load address. Unaligned image data is written to an offset of the load address and then the data is memcpy to the load address. This adds a small overhead of having to memcpy unaligned data, something that normally is not an issue. However, TF-A may have a segment that should be loaded into SRAM, e.g. vendor TF-A for RK3568 has a 8KiB segment that should be loaded into the 8KiB PMU SRAM. Having the image data for such segment unaligned result in segment being written to and memcpy from beyond the SRAM boundary, in the end this results in invalid data in SRAM. Aligning the FIT and its external data to MMC block length to work around such issue. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/rockchip-u-boot.dtsi1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/dts/rockchip-u-boot.dtsi b/arch/arm/dts/rockchip-u-boot.dtsi
index 234fc5df43..63c8da456b 100644
--- a/arch/arm/dts/rockchip-u-boot.dtsi
+++ b/arch/arm/dts/rockchip-u-boot.dtsi
@@ -37,6 +37,7 @@
fit,fdt-list = "of-list";
filename = "u-boot.itb";
fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>;
+ fit,align = <512>;
offset = <CONFIG_SPL_PAD_TO>;
images {
u-boot {