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| author | Tom Rini <trini@konsulko.com> | 2022-11-20 02:45:36 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-12-06 00:08:37 +0300 |
| commit | b43295a27712c136afc68b0cf272e0356474642c (patch) | |
| tree | 8a92a0e613c4dbb4b39341049cd7b642ad77c0bf /arch | |
| parent | fcd7ba655e24c736c7f3a1d12fb98f1c9c2705b6 (diff) | |
| download | u-boot-b43295a27712c136afc68b0cf272e0356474642c.tar.xz | |
Convert CONFIG_TEGRA_CLOCK_SCALING et al to Kconfig
This converts the following to Kconfig:
CONFIG_TEGRA_CLOCK_SCALING
CONFIG_TEGRA_LP0
CONFIG_TEGRA_PMU
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-tegra/tegra20/Kconfig | 12 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/tegra20/warmboot.c | 4 |
2 files changed, 12 insertions, 4 deletions
diff --git a/arch/arm/mach-tegra/tegra20/Kconfig b/arch/arm/mach-tegra/tegra20/Kconfig index 5c4d35b567..345563fc78 100644 --- a/arch/arm/mach-tegra/tegra20/Kconfig +++ b/arch/arm/mach-tegra/tegra20/Kconfig @@ -1,5 +1,15 @@ if TEGRA20 +config TEGRA_LP0 + bool + select TEGRA_CLOCK_SCALING + +config TEGRA_PMU + bool + +config TEGRA_CLOCK_SCALING + bool + choice prompt "Tegra20 board select" optional @@ -23,6 +33,8 @@ config TARGET_PLUTUX config TARGET_SEABOARD bool "NVIDIA Seaboard" select BOARD_LATE_INIT + select TEGRA_LP0 + select TEGRA_PMU config TARGET_TEC bool "Avionic Design Tamonten Evaluation Carrier" diff --git a/arch/arm/mach-tegra/tegra20/warmboot.c b/arch/arm/mach-tegra/tegra20/warmboot.c index 3d3758f6e6..5e3a9ebace 100644 --- a/arch/arm/mach-tegra/tegra20/warmboot.c +++ b/arch/arm/mach-tegra/tegra20/warmboot.c @@ -23,10 +23,6 @@ DECLARE_GLOBAL_DATA_PTR; -#ifndef CONFIG_TEGRA_CLOCK_SCALING -#error "You must enable CONFIG_TEGRA_CLOCK_SCALING to use CONFIG_TEGRA_LP0" -#endif - /* * This is the place in SRAM where the SDRAM parameters are stored. There * are 4 blocks, one for each RAM code |