diff options
| author | Eugen Hristev <eugen.hristev@microchip.com> | 2022-01-04 19:23:36 +0300 |
|---|---|---|
| committer | Eugen Hristev <eugen.hristev@microchip.com> | 2022-01-17 12:18:39 +0300 |
| commit | e92ebf9f250ad2c2cbd6073d075c17c7ed91852f (patch) | |
| tree | 77cd80c98754e6d88ec8c29554158311d4a0e766 /arch | |
| parent | 4727f954a44c089769b2164a95c1e141bb548870 (diff) | |
| download | u-boot-e92ebf9f250ad2c2cbd6073d075c17c7ed91852f.tar.xz | |
ARM: dts: at91: sama7g5ek: move eeproms to flexcom8
The rev4 of the board sama7g5ek has the eeproms on flexcom8 instead of
flexcom1.
Initialize flexcom8 with required pincontrol and move the eeproms accordingly.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/sama7g5ek.dts | 39 |
1 files changed, 30 insertions, 9 deletions
diff --git a/arch/arm/dts/sama7g5ek.dts b/arch/arm/dts/sama7g5ek.dts index 16192ca0b1..6adb044258 100644 --- a/arch/arm/dts/sama7g5ek.dts +++ b/arch/arm/dts/sama7g5ek.dts @@ -20,6 +20,7 @@ aliases { serial0 = &uart0; i2c0 = &i2c1; + i2c1 = &i2c8; }; chosen { @@ -92,17 +93,31 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx1_default>; status = "okay"; +}; - eeprom@52 { - compatible = "microchip,24aa02e48"; - reg = <0x52>; - pagesize = <16>; - }; +&flx8 { + atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>; + status = "okay"; + + i2c8: i2c@600 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c8_default>; + i2c-analog-filter; + i2c-digital-filter; + i2c-digital-filter-width-ns = <35>; + status = "okay"; - eeprom@53 { - compatible = "microchip,24aa02e48"; - reg = <0x53>; - pagesize = <16>; + eeprom@52 { + compatible = "microchip,24aa02e48"; + reg = <0x52>; + pagesize = <16>; + }; + + eeprom@53 { + compatible = "microchip,24aa02e48"; + reg = <0x53>; + pagesize = <16>; + }; }; }; @@ -145,6 +160,12 @@ bias-pull-up; }; + pinctrl_i2c8_default: i2c8_default { + pinmux = <PIN_PC14__FLEXCOM8_IO0>, + <PIN_PC13__FLEXCOM8_IO1>; + bias-disable; + }; + pinctrl_qspi: qspi { pinmux = <PIN_PB12__QSPI0_IO0>, <PIN_PB11__QSPI0_IO1>, |