Migrate CUSTOM_SYS_INIT_SP_ADDR to Kconfig using system-constants.h

- Make all users of CUSTOM_SYS_INIT_SP_ADDR reference SYS_INIT_SP_ADDR
- Introduce HAS_CUSTOM_SYS_INIT_SP_ADDR to allow for setting the stack
  pointer directly, otherwise we use the common calculation.
- On some platforms that were using the standard calculation but did not
  set CONFIG_SYS_INIT_RAM_SIZE / CONFIG_SYS_INIT_RAM_ADDR, set them.
- On a small number of platforms that were not subtracting
  GENERATED_GBL_DATA_SIZE do so now via the standard calculation.
- CONFIG_SYS_INIT_SP_OFFSET is now widely unused, so remove it from most
  board config header files.

Signed-off-by: Tom Rini <trini@konsulko.com>

20 files changed, 38 insertions, 37 deletions

diff --git a/arch/arc/lib/start.S b/arch/arc/lib/start.S
index 016ae85be2..9f5547e552 100644
--- a/arch/arc/lib/start.S
+++ b/arch/arc/lib/start.S
@@ -7,6 +7,7 @@
 #include <config.h>
 #include <linux/linkage.h>
 #include <asm/arcregs.h>
+#include <system-constants.h>
 
 ENTRY(_start)
 	/* Setup interrupt vector base that matches "__text_start" */
@@ -86,7 +87,7 @@ ENTRY(_start)
 #endif
 
 	/* Establish C runtime stack and frame */
-	mov	%sp, CONFIG_SYS_INIT_SP_ADDR
+	mov	%sp, SYS_INIT_SP_ADDR
 	mov	%fp, %sp
 
 	/* Allocate reserved area from current top of stack */
diff --git a/arch/arm/cpu/arm926ejs/mxs/start.S b/arch/arm/cpu/arm926ejs/mxs/start.S
index adec2c8ada..61982e38a1 100644
--- a/arch/arm/cpu/arm926ejs/mxs/start.S
+++ b/arch/arm/cpu/arm926ejs/mxs/start.S
@@ -21,6 +21,7 @@
 #include <asm-offsets.h>
 #include <config.h>
 #include <common.h>
+#include <system-constants.h>
 
 /*
  *************************************************************************
@@ -44,7 +45,7 @@ reset:
 	 * it point to the end of OCRAM if the SP is zero.
 	 */
 	cmp	sp, #0x00000000
-	ldreq	sp, =CONFIG_SYS_INIT_SP_ADDR
+	ldreq	sp, =SYS_INIT_SP_ADDR
 
 	/*
 	 * Store all registers on old stack pointer, this will allow us later to
diff --git a/arch/arm/cpu/armv7/lowlevel_init.S b/arch/arm/cpu/armv7/lowlevel_init.S
index ba4b374a8b..3c8c07fe01 100644
--- a/arch/arm/cpu/armv7/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/lowlevel_init.S
@@ -13,6 +13,7 @@
 #include <asm-offsets.h>
 #include <config.h>
 #include <linux/linkage.h>
+#include <system-constants.h>
 
 .pushsection .text.s_init, "ax"
 WEAK(s_init)
@@ -28,7 +29,7 @@ WEAK(lowlevel_init)
 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
 	ldr	sp, =CONFIG_SPL_STACK
 #else
-	ldr	sp, =CONFIG_SYS_INIT_SP_ADDR
+	ldr	sp, =SYS_INIT_SP_ADDR
 #endif
 	bic	sp, sp, #7 /* 8-byte alignment for ABI compliance */
 #ifdef CONFIG_SPL_DM
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 37036128a7..4f6327fe3a 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -17,6 +17,7 @@
 #include <asm/system.h>
 #include <linux/linkage.h>
 #include <asm/armv7.h>
+#include <system-constants.h>
 
 /*************************************************************************
  *
@@ -254,7 +255,7 @@ ENTRY(cpu_init_cp15)
 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
 	ldr	r0, =(CONFIG_SPL_STACK)
 #else
-	ldr	r0, =(CONFIG_SYS_INIT_SP_ADDR)
+	ldr	r0, =(SYS_INIT_SP_ADDR)
 #endif
 	bic	r0, r0, #7	/* 8-byte alignment for ABI compliance */
 	mov	sp, r0
diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index 612a2d5b69..fe6b4472b9 100644
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -9,6 +9,7 @@
 #include <asm-offsets.h>
 #include <linux/linkage.h>
 #include <asm/assembler.h>
+#include <system-constants.h>
 
 /*
  * This file handles the target-independent stages of the U-Boot
@@ -104,7 +105,7 @@ ENTRY(_main)
 #elif defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
 	ldr	r0, =(CONFIG_SPL_STACK)
 #else
-	ldr	r0, =(CONFIG_SYS_INIT_SP_ADDR)
+	ldr	r0, =(SYS_INIT_SP_ADDR)
 #endif
 	bic	r0, r0, #7	/* 8-byte alignment for ABI compliance */
 	mov	sp, r0
diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S
index 84c04bd43a..dcc924dd2f 100644
--- a/arch/arm/lib/crt0_64.S
+++ b/arch/arm/lib/crt0_64.S
@@ -13,6 +13,7 @@
 #include <asm-offsets.h>
 #include <asm/macro.h>
 #include <linux/linkage.h>
+#include <system-constants.h>
 
 /*
  * This file handles the target-independent stages of the U-Boot
@@ -81,7 +82,7 @@ ENTRY(_main)
 #endif
 	add	x0, x0, #CONFIG_SYS_INIT_SP_BSS_OFFSET
 #else
-	ldr	x0, =(CONFIG_SYS_INIT_SP_ADDR)
+	ldr	x0, =(SYS_INIT_SP_ADDR)
 #endif
 	bic	sp, x0, #0xf	/* 16-byte alignment for ABI compliance */
 	mov	x0, sp
diff --git a/arch/arm/lib/vectors_m.S b/arch/arm/lib/vectors_m.S
index 7d2d55c7f9..8d88cc756f 100644
--- a/arch/arm/lib/vectors_m.S
+++ b/arch/arm/lib/vectors_m.S
@@ -7,6 +7,7 @@
 #include <config.h>
 #include <asm/assembler.h>
 #include <linux/linkage.h>
+#include <system-constants.h>
 
 .type __hard_fault_entry, %function
 __hard_fault_entry:
@@ -35,7 +36,7 @@ __invalid_entry:
 
    .section  .vectors
 ENTRY(_start)
-	.long	CONFIG_SYS_INIT_SP_ADDR		@ 0 - Reset stack pointer
+	.long	SYS_INIT_SP_ADDR		@ 0 - Reset stack pointer
 	.long	reset				@ 1 - Reset
 	.long	__invalid_entry			@ 2 - NMI
 	.long	__hard_fault_entry		@ 3 - HardFault
diff --git a/arch/arm/mach-kirkwood/include/mach/config.h b/arch/arm/mach-kirkwood/include/mach/config.h
index 7810cf22d4..45ee0272f7 100644
--- a/arch/arm/mach-kirkwood/include/mach/config.h
+++ b/arch/arm/mach-kirkwood/include/mach/config.h
@@ -27,9 +27,6 @@
 #define CONFIG_KIRKWOOD_RGMII_PAD_1V8	/* Set RGMII Pad voltage to 1.8V */
 #define CONFIG_KIRKWOOD_PCIE_INIT       /* Enable PCIE Port0 for kernel */
 
-/* Kirkwood has 2k of Security SRAM, use it for SP */
-#define CONFIG_SYS_INIT_SP_ADDR		0xC8012000
-
 #define CONFIG_I2C_MVTWSI_BASE0	KW_TWSI_BASE
 #define MV_UART_CONSOLE_BASE	KW_UART0_BASE
 #define MV_SATA_BASE		KW_SATA_BASE
diff --git a/arch/arm/mach-mvebu/include/mach/config.h b/arch/arm/mach-mvebu/include/mach/config.h
index fb4e5af770..4add0d9e10 100644
--- a/arch/arm/mach-mvebu/include/mach/config.h
+++ b/arch/arm/mach-mvebu/include/mach/config.h
@@ -27,9 +27,6 @@
 
 #define CONFIG_SYS_L2_PL310
 
-/* end of 16M scrubbed by training in bootrom */
-#define CONFIG_SYS_INIT_SP_ADDR		0x00FF0000
-
 #define MV_UART_CONSOLE_BASE		MVEBU_UART0_BASE
 
 /* Needed for SPI NOR booting in SPL */
diff --git a/arch/arm/mach-rmobile/lowlevel_init.S b/arch/arm/mach-rmobile/lowlevel_init.S
index eb6012a874..212e95539b 100644
--- a/arch/arm/mach-rmobile/lowlevel_init.S
+++ b/arch/arm/mach-rmobile/lowlevel_init.S
@@ -6,6 +6,7 @@
 
 #include <config.h>
 #include <linux/linkage.h>
+#include <system-constants.h>
 
 ENTRY(lowlevel_init)
 	ldr		r0, =MERAM_BASE
diff --git a/arch/arm/mach-rmobile/lowlevel_init_ca15.S b/arch/arm/mach-rmobile/lowlevel_init_ca15.S
index 967fb027a4..a52b761b25 100644
--- a/arch/arm/mach-rmobile/lowlevel_init_ca15.S
+++ b/arch/arm/mach-rmobile/lowlevel_init_ca15.S
@@ -8,6 +8,7 @@
 
 #include <config.h>
 #include <linux/linkage.h>
+#include <system-constants.h>
 
 ENTRY(lowlevel_init)
 #ifndef CONFIG_SPL_BUILD
@@ -75,7 +76,7 @@ _enable_actlr_smp: /* R8A7794 only (CA7) */
 #endif
 
 _exit_init_l2_a15:
-	ldr	r3, =(CONFIG_SYS_INIT_SP_ADDR)
+	ldr	r3, =(SYS_INIT_SP_ADDR)
 	sub	sp, r3, #4
 	str	lr, [sp]
 
diff --git a/arch/arm/mach-uniphier/arm32/late_lowlevel_init.S b/arch/arm/mach-uniphier/arm32/late_lowlevel_init.S
index 36db50fd97..6c722d02ed 100644
--- a/arch/arm/mach-uniphier/arm32/late_lowlevel_init.S
+++ b/arch/arm/mach-uniphier/arm32/late_lowlevel_init.S
@@ -6,8 +6,9 @@
 
 #include <config.h>
 #include <linux/linkage.h>
+#include <system-constants.h>
 
 ENTRY(lowlevel_init)
-	ldr	sp, = CONFIG_SYS_INIT_SP_ADDR
+	ldr	sp, = SYS_INIT_SP_ADDR
 	b	uniphier_cache_disable
 ENDPROC(lowlevel_init)
diff --git a/arch/mips/cpu/start.S b/arch/mips/cpu/start.S
index 47251a5b92..2acc21d587 100644
--- a/arch/mips/cpu/start.S
+++ b/arch/mips/cpu/start.S
@@ -10,11 +10,7 @@
 #include <asm/asm.h>
 #include <asm/regdef.h>
 #include <asm/mipsregs.h>
-
-#ifndef CONFIG_SYS_INIT_SP_ADDR
-#define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_SYS_SDRAM_BASE + \
-				CONFIG_SYS_INIT_SP_OFFSET)
-#endif
+#include <system-constants.h>
 
 #ifdef CONFIG_32BIT
 # define STATUS_SET	0
@@ -44,7 +40,7 @@
 
 	.macro setup_stack_gd
 	li	t0, -16
-	PTR_LI	t1, CONFIG_SYS_INIT_SP_ADDR
+	PTR_LI	t1, SYS_INIT_SP_ADDR
 	and	sp, t1, t0		# force 16 byte alignment
 	PTR_SUBU \
 		sp, sp, GD_SIZE		# reserve space for gd
diff --git a/arch/mips/mach-mtmips/mt7628/lowlevel_init.S b/arch/mips/mach-mtmips/mt7628/lowlevel_init.S
index 83cd8fa9b6..cb369fbc27 100644
--- a/arch/mips/mach-mtmips/mt7628/lowlevel_init.S
+++ b/arch/mips/mach-mtmips/mt7628/lowlevel_init.S
@@ -12,16 +12,11 @@
 #include <asm/mipsregs.h>
 #include <asm/addrspace.h>
 #include <asm/asm.h>
+#include <system-constants.h>
 #include "mt7628.h"
 
-/* Set temporary stack address range */
-#ifndef CONFIG_SYS_INIT_SP_ADDR
-#define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_SYS_SDRAM_BASE + \
-				CONFIG_SYS_INIT_SP_OFFSET)
-#endif
-
 #define CACHE_STACK_SIZE	0x4000
-#define CACHE_STACK_BASE	(CONFIG_SYS_INIT_SP_ADDR - CACHE_STACK_SIZE)
+#define CACHE_STACK_BASE	(SYS_INIT_SP_ADDR - CACHE_STACK_SIZE)
 
 #define DELAY_USEC(us)		((58 * (us)) / 3)
 
@@ -134,7 +129,7 @@ NESTED(lowlevel_init, 0, ra)
 
 #if CONFIG_IS_ENABLED(INIT_STACK_WITHOUT_MALLOC_F)
 	/* Set malloc base */
-	li	t0, (CONFIG_SYS_INIT_SP_ADDR + 15) & (~15)
+	li	t0, (SYS_INIT_SP_ADDR + 15) & (~15)
 	PTR_S	t0, GD_MALLOC_BASE(k0)	# gd->malloc_base offset
 #endif
 
diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c b/arch/powerpc/cpu/mpc83xx/cpu_init.c
index b2b259b1cb..e3e1bfd65a 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <asm-offsets.h>
 #include <mpc83xx.h>
+#include <system-constants.h>
 #include <ioports.h>
 #include <asm/global_data.h>
 #include <asm/io.h>
@@ -138,7 +139,7 @@ void cpu_init_f (volatile immap_t * im)
 		0;
 
 	/* Pointer is writable since we allocated a register for it */
-	gd = (gd_t *)CONFIG_SYS_INIT_SP_ADDR;
+	gd = (gd_t *)SYS_INIT_SP_ADDR;
 
 	/* global data region was cleared in start.S */
 
diff --git a/arch/powerpc/cpu/mpc83xx/spl_minimal.c b/arch/powerpc/cpu/mpc83xx/spl_minimal.c
index 6d4655f1ad..d8f6cfe2b4 100644
--- a/arch/powerpc/cpu/mpc83xx/spl_minimal.c
+++ b/arch/powerpc/cpu/mpc83xx/spl_minimal.c
@@ -7,6 +7,7 @@
 #include <asm-offsets.h>
 #include <clock_legacy.h>
 #include <mpc83xx.h>
+#include <system-constants.h>
 #include <time.h>
 #include <asm/global_data.h>
 
@@ -25,7 +26,7 @@ DECLARE_GLOBAL_DATA_PTR;
 void cpu_init_f (volatile immap_t * im)
 {
 	/* Pointer is writable since we allocated a register for it */
-	gd = (gd_t *)CONFIG_SYS_INIT_SP_ADDR;
+	gd = (gd_t *)SYS_INIT_SP_ADDR;
 
 	/* global data region was cleared in start.S */
 
diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S
index b136456f5f..8a351b927c 100644
--- a/arch/powerpc/cpu/mpc83xx/start.S
+++ b/arch/powerpc/cpu/mpc83xx/start.S
@@ -13,6 +13,7 @@
 #include <asm-offsets.h>
 #include <config.h>
 #include <mpc83xx.h>
+#include <system-constants.h>
 
 #include <ppc_asm.tmpl>
 #include <ppc_defs.h>
@@ -229,8 +230,8 @@ in_flash:
 	/* set up the stack pointer in our newly created
 	 * cache-ram; use r3 to keep the new SP for now to
 	 * avoid overiding the SP it uselessly */
-	lis	r3, CONFIG_SYS_INIT_SP_ADDR@h
-	ori	r3, r3, CONFIG_SYS_INIT_SP_ADDR@l
+	lis	r3, SYS_INIT_SP_ADDR@h
+	ori	r3, r3, SYS_INIT_SP_ADDR@l
 
 	/* r4 = end of GD area */
 	addi r4, r3, GENERATED_GBL_DATA_SIZE
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
index 612941f9e7..1bba216371 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <system-constants.h>
 #include <asm-offsets.h>
 #include <asm/global_data.h>
 #include <asm/processor.h>
@@ -94,7 +95,7 @@ void cpu_init_early_f(void *fdt)
 #endif
 
 	/* Pointer is writable since we allocated a register for it */
-	gd = (gd_t *)CONFIG_SYS_INIT_SP_ADDR;
+	gd = (gd_t *)SYS_INIT_SP_ADDR;
 
 	/* gd area was zeroed during startup */
 
diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index 649afa0860..9a28269020 100644
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -14,6 +14,7 @@
 #include <asm-offsets.h>
 #include <config.h>
 #include <mpc85xx.h>
+#include <system-constants.h>
 
 #include <ppc_asm.tmpl>
 #include <ppc_defs.h>
@@ -1160,8 +1161,8 @@ _start_cont:
 	bne	1b
 
 #if CONFIG_VAL(SYS_MALLOC_F_LEN)
-	lis	r4,CONFIG_SYS_INIT_SP_ADDR@h
-	ori	r4,r4,CONFIG_SYS_INIT_SP_ADDR@l
+	lis	r4,SYS_INIT_SP_ADDR@h
+	ori	r4,r4,SYS_INIT_SP_ADDR@l
 
 	addi	r3,r3,16	/* Pre-relocation malloc area */
 	stw	r3,GD_MALLOC_BASE(r4)
diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
index 76850ec9be..f2ef5564a1 100644
--- a/arch/riscv/cpu/start.S
+++ b/arch/riscv/cpu/start.S
@@ -13,6 +13,7 @@
 #include <config.h>
 #include <common.h>
 #include <elf.h>
+#include <system-constants.h>
 #include <asm/encoding.h>
 #include <generated/asm-offsets.h>
 
@@ -94,7 +95,7 @@ call_board_init_f:
 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
 	li	t1, CONFIG_SPL_STACK
 #else
-	li	t1, CONFIG_SYS_INIT_SP_ADDR
+	li	t1, SYS_INIT_SP_ADDR
 #endif
 	and	sp, t1, t0		/* force 16 byte alignment */