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authorMarek Vasut <marex@denx.de>2021-11-13 05:27:37 +0300
committerPatrice Chotard <patrice.chotard@foss.st.com>2021-12-13 16:34:11 +0300
commit98fe251a241ce98860b8d3075331d081de0a166a (patch)
treeefdf85ccf7554d6e57eb551f25b29c12a9043217 /arch
parent7c870f8d70f633003ced94bacfda22df9a6a810f (diff)
downloadu-boot-98fe251a241ce98860b8d3075331d081de0a166a.tar.xz
ARM: dts: stm32: Add custom PHY reset bindings on AV96
The ethernet PHY must be reset on AV96, however DWMAC currently does not support the MDIO-bus PHY GPIO reset bindings and the ethernet MAC PHY reset property is going away on next DT sync. Add PHY specific reset bindings to trigger the PHY reset and fix sporadic ethernet malfunctions, until the next DT sync. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi
index 8b275e4950..4b1dbf0838 100644
--- a/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi
@@ -19,6 +19,17 @@
};
};
+
+&ethernet0 {
+ mdio0 {
+ ethernet-phy@7 {
+ reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <11000>;
+ reset-deassert-us = <1000>;
+ };
+ };
+};
+
&sdmmc1 {
u-boot,dm-spl;
};