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| author | Minda Chen <minda.chen@starfivetech.com> | 2024-04-12 13:18:02 +0300 |
|---|---|---|
| committer | Minda Chen <minda.chen@starfivetech.com> | 2024-04-26 12:18:29 +0300 |
| commit | 1444304dac5753ace8b3b7e5c0e5671f97e4a657 (patch) | |
| tree | 4ce75a8e8559a1221532372bd7fc05be06c49ea5 /arch | |
| parent | 466022f48c865d9e5eb9b4641569053ffd6c79e5 (diff) | |
| download | u-boot-1444304dac5753ace8b3b7e5c0e5671f97e4a657.tar.xz | |
spl: amp: Enable UART2 and move rtos image to memory
Enable UART2 for rtos and move rtos image to running memory.
The image size is 832KB.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/riscv/include/asm/arch-jh7110/jh7110-regs.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/riscv/include/asm/arch-jh7110/jh7110-regs.h b/arch/riscv/include/asm/arch-jh7110/jh7110-regs.h index 156709e6ae..03a7293985 100644 --- a/arch/riscv/include/asm/arch-jh7110/jh7110-regs.h +++ b/arch/riscv/include/asm/arch-jh7110/jh7110-regs.h @@ -114,5 +114,8 @@ #define CLK_QSPI_REF_SW_SHIFT 24 #define CLK_QSPI_REF_SW_MASK 0x1000000U +#define CLK_UART2_APB_OFFSET 0x254 +#define CLK_UART2_CORE_OFFSET 0x258 +#define CLK_RSTN_3_OFFSET 0x300 #endif /* __STARFIVE_JH7110_REGS_H */ |